Katsuyuki Sato

Dispositif de circuit semi-conducteur intégré

Kazumasa Yanagisawa, Katsuyuki Sato, 1985 .

A system-integrate ULSI chip containing eleven 4 Mb RAMs, six 64 kb SRAMs and an 18 k gate array

H. Miyazawa, Katsuyuki Sato, K. Fujita, 1992, 1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A wafer-scale-level system integrated LSI containing eleven 4-Mb DRAMs, six 64-kb SRAMs, and an 18 K-gate array

Katsuyuki Sato, Y. Shirai, K. Fujita, 1992 .

Unattended Discharging and Loading Equipment for the Large Capacity Tub at Ikeshima Coal Mine.

Katsuyuki Sato, 1995 .

Study of assist control for standing up motion using pneumatic cylinders

Katsuyuki Sato, Yosihiro Sasaki, 2019 .

Battery management for fuel cell/battery hybrid power supply system

Tadatoshi Babasaki, Toshiaki Yachi, Katsuyuki Sato, 2011, 2011 IEEE 33rd International Telecommunications Energy Conference (INTELEC).

Dual-period self-refresh scheme for low-power DRAM's with on-chip PROM mode register

Youji Idei, Katsuhiro Shimohigashi, Katsuyuki Sato, 1998 .

A 20ns static column 1Mb DRAM in CMOS technology

H. Kawamoto, Ryoichi Hori, Kazumasa Yanagisawa, 1985, 1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

Power Reduction Techniques in Megabit DRAM's

Kiyoo Itoh, Yoshiki Kawajiri, H. Kawamoto, 1986 .