B. Abderazek

发表

Mathematical Model for Multiobjective Synthesis of NoC Architectures

Tsutomu Yoshinaga, Masahiro Sowa, Ben A. Abderazek, 2007, 2007 International Conference on Parallel Processing Workshops (ICPPW 2007).

A new code generation algorithm for 2-offset producer order queue computation model

Arquimedes Canedo, Masahiro Sowa, Ben A. Abderazek, 2008, Comput. Lang. Syst. Struct..

Multicore systems-on-chip:practical hardware/software design

Ben Abdallah Abderazek, B. Abderazek, 2010 .

Comprehensive Analytic Performance Assessment and K-means based Multicast Routing Algorithm and Architecture for 3D-NoC of Spiking Neurons

Ben A. Abderazek, Yuichi Okuyama, The H. Vu, 2019, ACM J. Emerg. Technol. Comput. Syst..

Graceful deadlock-free fault-tolerant routing algorithm for 3D Network-on-Chip architectures

Akram Ben Ahmed, Ben A. Abderazek, B. Abderazek, 2014, J. Parallel Distributed Comput..

An Efficient Software-Hardware Design Framework for Spiking Neural Network Systems

Ben A. Abderazek, Khanh N. Dang, K. Dang, 2019, 2019 International Conference on Internet of Things, Embedded Systems and Communications (IINTEC).

High-Level Modeling and FPGA Prototyping of Produced Order Parallel Queue Processor Core

Tsutomu Yoshinaga, Masahiro Sowa, Ben A. Abderazek, 2006, The Journal of Supercomputing.

Microring fault-resilient photonic network-on-chip for reliable high-performance many-core systems

Ben A. Abderazek, Yuichi Okuyama, Michael Conrad Meyer, 2017, The Journal of Supercomputing.

FTTDOR: Microring Fault-resilient Optical Router for Reliable Optical Network-on-Chip Systems

Akram Ben Ahmed, Ben A. Abderazek, Yuichi Okuyama, 2015, 2015 IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip.

Hybrid silicon-photonic network-on-chip for future generations of high-performance many-core systems

Ben A. Abderazek, Achraf Ben Ahmed, B. Abderazek, 2015, The Journal of Supercomputing.

Contention-Free Routing for Hybrid Photonic Mesh-Based Network-on-Chip Systems

Ben A. Abderazek, Yuichi Okuyama, Achraf Ben Ahmed, 2015, 2015 IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip.

LA-XYZ: Low Latency, High Throughput Look-Ahead Routing Algorithm for 3D Network-on-Chip (3D-NoC) Architecture

Akram Ben Ahmed, Ben A. Abderazek, B. Abderazek, 2012, 2012 IEEE 6th International Symposium on Embedded Multicore SoCs.

Advanced Multicore Systems-On-Chip

Ben A. Abderazek, B. Abderazek, 2017, Springer Singapore.

Run-Time Monitoring Mechanism for Efficient Design of Application-Specific NoC Architectures in Multi/Manycore Era

Akram Ben Ahmed, Ben A. Abderazek, Takayuki Ochi, 2013, 2013 Seventh International Conference on Complex, Intelligent, and Software Intensive Systems.

Natural instruction level parallelism-aware compiler for high-performance QueueCore processor architecture

Arquimedes Canedo, Ben A. Abderazek, Kenichi Kuroda, 2011, The Journal of Supercomputing.

Design and implementation of a queue compiler

Arquimedes Canedo, Masahiro Sowa, Ben A. Abderazek, 2009, Microprocess. Microsystems.

Scalable core-based methodology and synthesizable core for systematic design environment in multicore SoC (MCSoC)

Tsutomu Yoshinaga, Masahiro Sowa, Ben A. Abderazek, 2006, 2006 International Conference on Parallel Processing Workshops (ICPPW'06).

Design and architecture for an embedded 32-bit QueueCore

Masahiro Sowa, Ben A. Abderazek, Sotaro Kawata, 2006, J. Embed. Comput..

Modular Design Structure and High-Level Prototyping for Novel Embedded Processor Core

Tsutomu Yoshinaga, Masahiro Sowa, Ben A. Abderazek, 2005, EUC.

Software and Hardware Design Issues for Low Complexity High Performance Processor Architecture

Arquimedes Canedo, Ben A. Abderazek, Masashi Masuda, 2009, 2009 International Conference on Parallel Processing Workshops.

Novel Addressing Method for Aggregate Types in Queue Processors

B.A. Abderazek, M. Sowa, T. Yuki, 2007, 2007 International Conference on Convergence Information Technology (ICCIT 2007).

Queue Register File Optimization Algorithm for QueueCore Processor

A. Canedo, B. Abderazek, M. Sowa, 2007, 19th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'07).

Multicore Systems On-Chip: Practical Software/Hardware Design

Ben A. Abderazek, B. Abderazek, 2010, Atlantis Ambient and Pervasive Intelligence.

Compiler Support for Code Size Reduction Using a Queue-Based Processor

Arquimedes Canedo, Masahiro Sowa, Ben A. Abderazek, 2009, Trans. High Perform. Embed. Archit. Compil..

Advanced Optimization and Design Issues of a 32-Bit Embedded Processor Based on Produced Order Queue Computation Model

Ben A. Abderazek, Hiroki Hoshino, Kenichi Kuroda, 2008, 2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing.

Dual-execution mode processor architecture

Masahiro Sowa, Ben A. Abderazek, Md. Musfiquzzaman Akanda, 2008, The Journal of Supercomputing.

The QC-2 parallel Queue processor architecture

Tsutomu Yoshinaga, Arquimedes Canedo, Masahiro Sowa, 2008, J. Parallel Distributed Comput..

New Code Generation Algorithm for QueueCore An Embedded Processor with High ILP

Arquimedes Canedo, Masahiro Sowa, Ben A. Abderazek, 2007, Eighth International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2007).

Processor for Mobile Applications

Arquimedes Canedo, Kenichi Kuroda, Ben A. Abderazek, 2009 .