Y. Arima

A self-learning neural network chip with 125 neurons and 10 K self-organization synapses

T. Yamada, S. Kayano, Y. Arima, 1990, Digest of Technical Papers., 1990 Symposium on VLSI Circuits.

A 9/spl mu/W 50MHz 32b adder using a self-adjusted forward body bias in SoCs

Y. Arima, T. Yamashita, K. Ishibashi, 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..