Gunok Jung

发表

Fully digital clock frequency doubler

Gi-Ho Park, Jae-Cheol Son, Gunok Jung, 2010, IEICE Electron. Express.

A Way Enabling Mechanism Based on the Branch Prediction Information for Low Power Instruction Cache

Shin-Dug Kim, Jung-Wook Park, Gi-Ho Park, 2009, IEICE Trans. Electron..

High Speed Pulse-based Flip-Flop with Pseudo MUX-type Scan for Standard Cell Library

Young-Hyun Jun, Youngmin Shin, Bai-Sun Kong, 2006 .

A static-switching pulse domino technique for statistical power reduction of wide fan-in dynamic gates

Suhwan Kim, Rahul Singh, Min-Su Kim, 2011, GLSVLSI '11.

Power and Skew Aware Point Diffusion Clock Network

Gi-Ho Park, Sung-Bae Park, Gunok Jung, 2008, IEICE Trans. Electron..

Time borrowing in high-speed functional units using skew-tolerant domino circuits

Gerald E. Sobelman, Gunok Jung, Victoria Perepelitsa, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

High-speed add-compare-select units using locally self-resetting CMOS

Keshab K. Parhi, Gerald E. Sobelman, Jun Jin Kong, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

High-speed adder design using time borrowing and early carry propagation

Gerald E. Sobelman, Gunok Jung, 2000, Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541).

Low-Power Embedded Processor Design Using Branch Direction

Shin-Dug Kim, Jung-Wook Park, Gi-Ho Park, 2009, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A robust self-resetting CMOS 32-bit parallel adder

Gerald E. Sobelman, Gunok Jung, V. A. Sundarajan, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Scan-controlled pulse flip-flops for mobile application processors

Min-Su Kim, Youngmin Shin, Jin-Soo Park, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A 0.004mm/sup 2/ Portable Multiphase Clock Generator Tile for 1.2GHz RISC Microprocessor

Chulwoo Kim, Sung-Bae Park, Junyoung Park, 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..

Skew variation compensating technique for clock mesh networks

Jin-Soo Park, Sung-Bae Park, Gunok Jung, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

A 0.004mm/sup 2/ Portable Multiphase Clock Generator Tile for 1.2GHz RISC Microprocessor

Chulwoo Kim, Jun-Young Park, Janghoon Song, 2006, VLSIC 2006.

High-speed CORDIC implementations using advanced circuit techniques

Gerald E. Sobelman, Seonki Kim, Gunok Jung, 2001, 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221).

A 0.004-mm$^{2}$ Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor

Chulwoo Kim, Janghoon Song, Gunok Jung, 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.