Yinghua Min

发表

A new low-cost method for identifying untestable path delay faults

Robert K. Brayton, Zhongcheng Li, Yinghua Min, 1998, Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259).

Node grouping in system-level fault diagnosis

Dafang Zhang, Gaogang Xie, Yinghua Min, 2008, Journal of Computer Science and Technology.

At-speed current testing [logic IC testing]

Yinghua Min, Jishun Kuang, Xiaoyan Niu, 2003, 2003 Test Symposium.

Adaptive message routing in a class of fault-tolerant multistage interconnection networks

Yinghua Min, Yingquan Zhou, Y. Min, 1997 .

Behavioral design and prototyping of a fail-safe system

Zhongcheng Li, Cheng Ye, Yinghua Min, 1994, Proceedings of 7th International Conference on VLSI Design.

Testing Functional Faults in VLSI

Yinghua Min, Stephen Y. H. Su, 1982, DAC 1982.

Domain testing based on character string predicate [software testing]

Michael R. Lyu, Yinghua Min, Ruilian Zhao, 2003, 2003 Test Symposium.

An analytical delay model based on Boolean process

Zhongcheng Li, Yinghua Min, Zhuxing Zhao, 1996, Proceedings of 9th International Conference on VLSI Design.

An efficient BIST design using LFSR-ROM architecture

Yinghua Min, Lijian Li, 2000, Proceedings of the Ninth Asian Test Symposium.

An approach to reducing power consumption during delay test application

Huawei Li, Zuying Luo, Yinghua Min, 2001, ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549).

Fault Detection Capability of an O ( m・n ) Test Generation Algorithm for PLAs

Hideo Fujiwara, Yinghua Min, 1991 .

Test Education in the Global Economy

Yinghua Min, Cheng-Wen Wu, T. Cheng, 2007, 16th Asian Test Symposium (ATS 2007).

On concurrent multiple error diagnosability in linear analog circuits using continuous checksum

Yinghua Min, Yingquan Zhou, Mike W. T. Wong, 1998, Int. J. Circuit Theory Appl..

I/sub DDT/ testing

Zhongcheng Li, Yinghua Min, Zhuxing Zhao, 1997, Proceedings Sixth Asian Test Symposium (ATS'97).

Timed binary decision diagrams

Robert K. Brayton, Yuhong Zhao, Zhongcheng Li, 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.

Panel: New Research Problems in the Emerging Test Technology

Vishwani D. Agrawal, Bernard Courtois, Fumiyasu Hirose, 1995, Asian Test Symposium.

Evaluation of test generation algorithms

Zhongcheng Li, Yinghua Min, 1993, Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium.

Hardware reduction in concurrent error detection checkers in linear analog circuits using continuous checksums

Yinghua Min, Yingquan Zhou, Mike W. T. Wong, 1995, 1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings.

A novel RTL behavioral description based ATPG method

Huawei Li, Xiaowei Li, Yinghua Min, 2008, Journal of Computer Science and Technology.

Automatic string test data generation for detecting domain errors

Michael R. Lyu, Yinghua Min, Ruilian Zhao, 2009, Softw. Test. Verification Reliab..

Reducing power dissipation during at-speed test application

Huawei Li, Xiaowei Li, Yinghua Min, 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

IDDT: Fundamentals and test generation

Yinghua Min, Jishun Kuang, Zhiqiang Yang, 2003, Journal of Computer Science and Technology.

Boolean process-an analytical approach to circuit representation. II

Zhongcheng Li, Yinghua Min, Zhuxing Zhao, 1995, Proceedings of the Fourth Asian Test Symposium.

A Novel NMR Structure with Concurrent Error Location Capabilities

Yinghua Min, Hongbao Shi, Jianhui Jiang, 1999 .

Optimal fault-tolerant routing in hypercubes using extended safety vectors

Jie Wu, Feng Gao, Zhongcheng Li, 2000, Proceedings Seventh International Conference on Parallel and Distributed Systems (Cat. No.PR00568).

IDDT Testing

Zhongcheng Li, Yinghua Min, Zhuxing Zhao, 1997 .

Selected Transition Time Adjustment for Tolerating Crosstalk Effects on Network-on-Chip Interconnects

Ying Zhang, Huawei Li, Xiaowei Li, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Feasibility and effectiveness of the algorithm for overhead reduction in analog checkers

Yinghua Min, Yingquan Zhou, Mike W. T. Wong, 1995, Twenty-Fifth International Symposium on Fault-Tolerant Computing. Digest of Papers.

IDDT Testing versus IDDQ Testing

Zhongcheng Li, Yinghua Min, Y. Min, 1998, J. Electron. Test..

Automatic string test data generation for detecting domain errors

Michael R. Lyu, Yinghua Min, Ruilian Zhao, 2010 .

Localization and aftereffect of automatic test generation

Zhongcheng Li, Yinghua Min, Yuqi Pan, 1992, Proceedings First Asian Test Symposium (ATS `92).

A built-in test pattern generator

Yinghua Min, Zhide Han, Y. Min, 1986, Journal of Computer Science and Technology.

Pseudo-Exhaustive Testing Strategy for Large Combinational Circuits

Zhongcheng Li, Yinghua Min, 1986, Comput. Syst. Sci. Eng..

Testing Functional Faults in VLSI

Yinghua Min, Stephen Y. H. Su, 1982, 19th Design Automation Conference.

Survey on Traffic of Metro Area Network with Measurement On-Line

Valérie Issarny, Jianhua Yang, Gaogang Xie, 2007, International Teletraffic Congress.

Survey on QoS management of VoIP

Zhongcheng Li, Dong Xuan, Yinghua Min, 2003, 2003 International Conference on Computer Networks and Mobile Computing, 2003. ICCNMC 2003..

Basket Bloom Filters for Membership Queries

Dafang Zhang, Gaogang Xie, Kun Xie, 2005, TENCON 2005 - 2005 IEEE Region 10 Conference.

An analytical delay model

Zhongcheng Li, Yinghua Min, 2008, Journal of Computer Science and Technology.

Design & Test Education in Asia

Yervant Zorian, Hideo Fujiwara, Shiyi Xu, 2004, IEEE Des. Test Comput..

A kind of Multistage Interconnection Networks with multiple paths

Yinghua Min, Yingquan Zhou, Y. Min, 1996, Journal of Computer Science and Technology.

A new software testing approach based on domain analysis of specifications and programs

Michael R. Lyu, Yinghua Min, Ruilian Zhao, 2003, 14th International Symposium on Software Reliability Engineering, 2003. ISSRE 2003..

Path sensitization

Zhongcheng Li, Yinghua Min, Zhuxing Zhao, 1997, Journal of Computer Science and Technology.

Design of delay-verifiable combinational logic by adding extra inputs

Yinghua Min, Xiaoming Yu, 1997, Proceedings Sixth Asian Test Symposium (ATS'97).

An approach to RTL fault extraction and test generation

Xiaowei Li, Yinghua Min, Zhigang Yin, 2001, Proceedings 10th Asian Test Symposium.

At-Speed Current Testing *

Yinghua Min, Jishun Kuang, Xiaoyan Niu, 2003 .

On concurrent multiple error diagnosability in linear analog circuits using continuous checksum

Yinghua Min, Yingquan Zhou, Mike W. T. Wong, 1998 .

Reduction of Number of Paths to be Tested in Delay Testing

Zhongcheng Li, Yinghua Min, Huawei Li, 2000, J. Electron. Test..

Pseudo-random test generation for large combinational circuits

Zhongcheng Li, Yinghua Min, Y. Min, 2008, Journal of Computer Science and Technology.

Neural network realization of Markov model of TMR systems with compensating failures

Yinghua Min, Yingquan Zhou, 1993, Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS).

A novel NMR structure with concurrent output error location capability

Xiaodong Zhao, Yinghua Min, Jianhui Jiang, 1999, Proceedings 1999 Pacific Rim International Symposium on Dependable Computing.

Delay Testing with Double Observations

Zhongcheng Li, Yinghua Min, Huawei Li, 1998 .

Efficient identification of non-robustly untestable path delay faults

Robert K. Brayton, Zhongcheng Li, Yinghua Min, 1997, Proceedings International Test Conference 1997.

A waveform simulator based on Boolean process

Xiaoyang Yu, Cheng-Wen Wu, Yinghua Min, 2000, Proceedings of the Ninth Asian Test Symposium.

The monotonic increasing relationship between average powers of CMOS VLSI circuits with and without delay and its applications

Xiaowei Li, Zuying Luo, Shiyuan Yang, 2007, Science in China Series F: Information Sciences.

Clustering of behavioral phases in FSMs and its applications to VLSI test

Huawei Li, Zhongcheng Li, Yinghua Min, 2007, Science in China Series F: Information Sciences.

Level-oriented GA-based test generation of logic circuits

Shiyuan Yang, Yinghua Min, Wangning Long, 1997, 1997 IEEE International Conference on Intelligent Processing Systems (Cat. No.97TH8335).

Optimal, and reliable communication in hypercubes using extended safety vectors

Jie Wu, Feng Gao, Zhongcheng Li, 2005, IEEE Transactions on Reliability.

Basket BloomFilters forMembership Queries

Dafang Zhang, Gaogang Xie, Jigang Wen, 2005 .

An RT-level ATPG based on clustering of circuit states

Huawei Li, Zhongcheng Li, Yinghua Min, 2001, Proceedings 10th Asian Test Symposium.

Why RTL ATPG?

Yinghua Min, 2008, Journal of Computer Science and Technology.

A Scalable Bloom Filter for Membership Queries

Dafang Zhang, Gaogang Xie, Kun Xie, 2007, IEEE GLOBECOM 2007 - IEEE Global Telecommunications Conference.

Short-time scaling of variable ordering of OBDDs

Shiyuan Yang, Yinghua Min, Wangning Long, 2008, Journal of Computer Science and Technology.

A fail-safe microprocessor-based system for interlocking on railways

Zhongcheng Li, Cheng Ye, Yinghua Min, 1994, Proceedings of Annual Reliability and Maintainability Symposium (RAMS).

Structural analysis of large digital circuits

Zhongcheng Li, Yinghua Min, Yuqi Pan, 1991, [1991] Proceedings Pacific Rim International Symposium on Fault Tolerant Systems.

Delay testing with double observations [high-speed ICs]

Huawei Li, Zhongcheng Li, Yinghua Min, 1998, Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259).

Message from General Co-Chairs

Yinghua Min, Lee-Yee Lau, 2005, DS-RT.

Fault-tolerant systems with concurrent error-locating capability

Yinghua Min, Jianhui Jiang, Chenglian Peng, 2008, Journal of Computer Science and Technology.

Memory efficient ATPG for path delay faults

Zhongcheng Li, Shiyuan Yang, Yinghua Min, 1997, Proceedings Sixth Asian Test Symposium (ATS'97).

Aliasing errors in Parallel Signature Analyzers

Yinghua Min, Yashwant K. Malaiya, Boping Jin, 2008, Journal of Computer Science and Technology.

CLASSIFICATION YARD COMPUTER CONTROL SYSTEMS

Yinghua Min, Lianlong Yang, 1983 .

Hardware reduction in continuous checksum-based analog checkers: Algorithm and its analysis

Yinghua Min, Yingquan Zhou, Mike W. T. Wong, 1996, J. Electron. Test..

An improved scheme of index-based checkpointing

Dafang Zhang, Yinghua Min, Yuan-sheng Luo, 2005, 11th Pacific Rim International Symposium on Dependable Computing (PRDC'05).

Session details: Test and verification

Alan J. Hu, Yinghua Min, A. Hu, 2005, Asia and South Pacific Design Automation Conference.

Test power optimization techniques for CMOS circuits

Huawei Li, Xiaowei Li, Zuying Luo, 2002, Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02)..

Impact of Hazards on Pattern Selection for Small Delay Defects

Jie Wang, Huawei Li, Xiaowei Li, 2009, 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing.

A fault-tolerant and heuristic routing algorithm for faulty hypercubes

Yinghua Min, Youli Min, Y. Min, 1995, Journal of Computer Science and Technology.

Waveform polynomial manipulation using BDDs

Zhongcheng Li, Yinghua Min, Zhuxing Zhao, 1996, Proceedings of the Fifth Asian Test Symposium (ATS'96).

Analysis of Detection Capability of Parallel Signature Analyzers

Yinghua Min, Yashwant K. Malaiya, Boping Jin, 1991, IEEE Trans. Computers.

Boolean process

Yinghua Min, Zhuxing Zhao, Zhongcheng Li, 1997 .

Boolean process-an analytical approach to circuit representation

Yinghua Min, 1994, Proceedings of IEEE 3rd Asian Test Symposium (ATS).