M. Węgrzyn

Hardware implementation of real-time Extreme Learning Machine in FPGA: Analysis of precision, resource occupation and performance

Marek Wegrzyn, José V. Francés, Manuel Bataller-Mompeán, 2016, Comput. Electr. Eng..

Support Tool for the Combined Software/Hardware Design of On-Chip ELM Training for SLFF Neural Networks

Marek Wegrzyn, José V. Francés, Manuel Bataller-Mompeán, 2016, IEEE Transactions on Industrial Informatics.

Design environment for hardware generation of SLFF neural network topologies with ELM training capability

Marek Wegrzyn, José V. Francés, Manuel Bataller-Mompeán, 2015, 2015 IEEE 13th International Conference on Industrial Informatics (INDIN).

Experimental Comparison of Synthesis Tools Altera Quartus II and Synthagate

Marek Wegrzyn, Andrei Karatkevich, A. Karatkevich, 2013 .

Hardware-accelerated spike train generation for neuromorphic image and video processing

M. Wegrzyn, J. F. Guerrero-Martinez, T. Iakymchuk, 2014, 2014 IX Southern Conference on Programmable Logic (SPL).

Press F1 for help: Participatory design for dealing with on-line and real life security of older adults

Radoslaw Nielek, Marek Wegrzyn, Bartlomiej Balcerzak, 2017, 2017 12th International Scientific and Technical Conference on Computer Sciences and Information Technologies (CSIT).

From UML Specification into FPGA Implementation

Marian Adamski, Grzegorz Bazydlo, Marek Wegrzyn, 2014 .

Hardware-efficient matrix inversion algorithm for complex adaptive systems

Taras Iakymchuk, Marek Wegrzyn, Manuel Bataller-Mompeán, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).