Haidang Lin

6.3 A 10-to-112Gb/s DSP-DAC-Based Transmitter with 1.2Vppd Output Swing in 7nm FinFET

Nanyan Y. Wang, Marcus van Ierssel, Masum Hossain, 2020, 2020 IEEE International Solid- State Circuits Conference - (ISSCC).

A 576 Mb DRAM with 16-channel 10.3125Gbps serial I/O and 14.5 ns latency

Jae Choi, Ming Liu, Ben Lee, 2012, 2012 Proceedings of the ESSCIRC (ESSCIRC).

A 8.125–15.625 Gb/s SerDes using a sub-sampling ring-oscillator phase-locked loop

Chethan Rao, Prashant Choudhary, Paul Jennings, 2014, Proceedings of the IEEE 2014 Custom Integrated Circuits Conference.

A 4×112 Gb/s ADC-DSP Based Multistandard Receiver in 7nm FinFET

Masum Hossain, Nhat Nguyen, Marcus van Ierssel, 2020, 2020 IEEE Symposium on VLSI Circuits.

10-to-112-Gb/s DSP-DAC-Based Transmitter in 7-nm FinFET With Flex Clocking Architecture

Masum Hossain, Simon Li, Nhat Nguyen, 2021, IEEE Journal of Solid-State Circuits.