Yasuo Ohara

Chip for ATM SONETlSDH Framing and ClocWData Recovery

Yoshiyuki Suzuki, Takeshi Ogawara, Naoki Sugawa, 1997 .

Development of low power and high performance application processor (T6G) for multimedia mobile applications

Masafumi Takahashi, Yukihito Oowaki, Yu Kikuchi, 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).

The Phase Locked Loop for Clock Recovery Used in a Single-Chip 4-Channel 155Mb/s CMOS ATM Physical Layer Controller LSI(Special Issue on Multimedia, Network, and DRAM LSIs)

Takeshi Ogawara, Naoki Sugawa, Satoshi Oda, 1998 .

tRNADB-CE 2011: tRNA gene database curated manually by experts

Toshimichi Ikemura, Takashi Abe, Shigehiko Kanaya, 2010, Nucleic Acids Res..

A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm

Makoto Takahashi, Manabu Watanabe, Mototsugu Hamada, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

A 40 nm 222 mW H.264 Full-HD Decoding, 25 Power Domains, 14-Core Application Processor With x512b Stacked DRAM

Makoto Takahashi, Manabu Watanabe, Mototsugu Hamada, 2011, IEEE Journal of Solid-State Circuits.

tRNADB-CE: tRNA gene database curated manually by experts

Toshimichi Ikemura, Takashi Abe, Shigehiko Kanaya, 2008, Nucleic Acids Res..