Om Prakash Gangwal

发表

The Cost of Communication Protocols and Coordination Languages in Embedded Systems

Kees G. W. Goossens, Om Prakash Gangwal, O. P. Gangwal, 2002, COORDINATION.

Service-based design of systems on chip and networks on chip

Om Prakash Gangwal, Paul Wielage, John Dielissen, 2005 .

Real-time implementation of depth map post-processing for 3D-TV on a programmable DSP (TriMedia)

Om Prakash Gangwal, Robert-Paul Berretty, Etienne Coezijn, 2009, 2009 Digest of Technical Papers International Conference on Consumer Electronics.

A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification

Kees G. W. Goossens, Om Prakash Gangwal, Andrei Radulescu, 2005, Design, Automation and Test in Europe.

An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration

Om Prakash Gangwal, Kees Goossens, Andrei Radulescu, 2005 .

An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration

Kees G. W. Goossens, Om Prakash Gangwal, Andrei Radulescu, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

C-HEAP: A Heterogeneous Multi-Processor Architecture Template and Scalable and Flexible Protocol for the Design of Embedded Signal Processing Systems

Kees G. W. Goossens, Om Prakash Gangwal, Rafael Peset Llopis, 2002, Des. Autom. Embed. Syst..

Building Predictable Systems on Chip: An Analysis of Guaranteed Communication in the Aethereal Network on Chip

Om Prakash Gangwal, Kees Goossens, Edwin Rijpkema, 2005 .

Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks

Om Prakash Gangwal, Anshul Kumar, Jos T. J. van Eijndhoven, 2003, 16th International Conference on VLSI Design, 2003. Proceedings..

A scalable and flexible data synchronization scheme for embedded HW-SW shared-memory systems

Om Prakash Gangwal, Paul E. R. Lippens, André Nieuwland, 2001, International Symposium on System Synthesis (IEEE Cat. No.01EX526).

Real-time implementation of depth map post-processing for 3D-TV in dedicated hardware

Om Prakash Gangwal, Boris Djapic, 2010, 2010 Digest of Technical Papers International Conference on Consumer Electronics (ICCE).

Understanding video pixel processing applications for flexible implementations

Om Prakash Gangwal, Erwin B. Bellers, Marc Duranton, 2003, Euromicro Symposium on Digital System Design, 2003. Proceedings..

A Heterogeneous Multiprocessor Architecture for Flexible Media Processing

Om Prakash Gangwal, Evert-Jan D. Pol, Jos T. J. van Eijndhoven, 2002, IEEE Des. Test Comput..

On automatic analysis of geometrically proximate nets in VLSI layout

Om Prakash Gangwal, Sandeep Koranne, 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

Eclipse: heterogeneous multiprocessor architecture for flexible media processing

Om Prakash Gangwal, Evert-Jan D. Pol, Jos T. J. van Eijndhoven, 2002, Proceedings 16th International Parallel and Distributed Processing Symposium.

Application design trajectory towards reusable coprocessors - MPEG case study

Om Prakash Gangwal, Evert-Jan D. Pol, Jos T. J. van Eijndhoven, 2004, 2nd Workshop onEmbedded Systems for Real-Time Multimedia, 2004. ESTImedia 2004..

Cost-performance trade-offs in networks on chip: a simulation-based approach

Kees G. W. Goossens, Om Prakash Gangwal, Andrei Radulescu, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Data processing system and method for allocating time slots

Om Prakash Gangwal, Andrei Radulescu, Kees G Goossens, 2005 .

Interconnect and Memory Organization in SOCs for Advanced Set-Top Boxes and TV

Om Prakash Gangwal, Kees Goossens, A. P. Niranjan, 2004 .

Depth map post-processing for 3D-TV

Om Prakash Gangwal, Robert-Paul Berretty, O. P. Gangwal, 2009, 2009 Digest of Technical Papers International Conference on Consumer Electronics.