Gian Carlo Cardarilli

发表

A high speed Reed-Solomon encoder-decoder for fault tolerant solid state disks

Adelio Salsano, Gian Carlo Cardarilli, M. Di Zenzo, 1993, Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems.

ZnO-rGO Composite Thin Film Resistive Switching Device: Emulating Biological Synapse Behavior

Gian Carlo Cardarilli, Gaurav Mani Khanal, Simone Acciarito, 2016, ApplePies.

Design of a totally self checking signature analysis checker for finite state machines

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Localization of faults in radix-n signed digit adders

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

Digital Architecture and ASIC Implementation of Wideband Delta DOR Spacecraft Onboard Tracker

Gian Carlo Cardarilli, Lorenzo Simone, Dario Gelfusa, 2018, 2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).

Optimized Implementation of RNS FIR Filters Based on FPGAs

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2012, J. Signal Process. Syst..

A Power Efficient Digital Front-End for Cognitive Radio Systems

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2018, 2018 52nd Asilomar Conference on Signals, Systems, and Computers.

FPGA Implementation of a Low-Power QRS Extractor

Gian Carlo Cardarilli, Gaurav Mani Khanal, Simone Acciarito, 2017, ApplePies.

Development of a dynamic routing system for a fault tolerant solid state mass memory

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

A Wireless Sensor Node for Acoustic Emission Non-destructive Testing

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2017, ApplePies.

A CAD environment for fuzzy systems HW/SW mapping

Gian Carlo Cardarilli, Marco Re, Mario Salmeri, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAs

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

A framework for dynamically-loaded hardware library (HLL) in FPGA acceleration

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2015, 2015 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT).

Q‐RTS: a real‐time swarm intelligence based on multi‐agent Q‐learning

Gian Carlo Cardarilli, Rocco Fazzolari, Marco Re, 2019, Electronics Letters.

On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2008, VLSI-SoC.

Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders

Salvatore Pontarelli, Adelio Salsano, Massimo Violante, 2007, 13th IEEE International On-Line Testing Symposium (IOLTS 2007).

Design of fault-tolerant solid state mass memory

Adelio Salsano, Marcello Salmeri, Gian Carlo Cardarilli, 1999, Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99).

Spiking neural networks based on LIF with latency: Simulation and synchronization effects

Gian Carlo Cardarilli, Luca Di Nunzio, Alessandro Cristini, 2013, 2013 Asilomar Conference on Signals, Systems and Computers.

A fault-tolerant 176 Gbit solid state mass memory architecture

Marco Ottavi, Adelio Salsano, Gian Carlo Cardarilli, 2000, Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

A Q-Learning based PSK Symbol Synchronizer

Gian Carlo Cardarilli, Rocco Fazzolari, Marco Re, 2019, 2019 International Symposium on Signals, Circuits and Systems (ISSCS).

Bit flip injection in processor-based architectures: a case study

Marco Ottavi, Salvatore Pontarelli, A. Leandri, 2002, Proceedings of the Eighth IEEE International On-Line Testing Workshop (IOLTW 2002).

Describing Different Brain Computer Interface Systems Through a Unique Model: A UML Implementation

Lucia Rita Quitadamo, Maria Grazia Marciani, Luigi Bianchi, 2008, Neuroinformatics.

Twenty years of research on RNS for DSP: Lessons learned and future perspectives

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

Analysis and implementation of a VLSI neural network

Gian Carlo Cardarilli, P. Marinucci, G. Di Stefano, 1995, Proceedings of ICNN'95 - International Conference on Neural Networks.

Improvement of the Cardiac Oscillator Based Model for the Simulation of Bundle Branch Blocks

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2019, Applied Sciences.

Indoor Localization System Based on Bluetooth Low Energy for Museum Applications

Romeo Giuliano, Franco Mazzenga, Gian Carlo Cardarilli, 2020, Electronics.

FPGA oriented design of parity sharing RS codecs

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2005, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05).

Error detection in addition chain based ECC Point Multiplication

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2009, 2009 15th IEEE International On-Line Testing Symposium.

Robust throughput boosting for low latency dynamic partial reconfiguration

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2017, 2017 30th IEEE International System-on-Chip Conference (SOCC).

ADAPTO: full-adder based reconfigurable architecture for bit level operations

Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, 2008, 2008 IEEE International Symposium on Circuits and Systems.

Power-delay tradeoffs in residue number system

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Acoustic Emissions Detection and Ranging of Cracks in Metal Tanks Using Deep Learning

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2019, ApplePies.

Improved large-signal model for vacuum triodes

Gian Carlo Cardarilli, Marco Re, Leonardo Di Carlo, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Speed-up of RISC processor computation using ADAPTO

Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Optimized QPSK modulator for DVB-S applications

Gian Carlo Cardarilli, Lorenzo Simone, Marco Re, 2006, 2006 IEEE International Symposium on Circuits and Systems.

TDES cryptography algorithm acceleration using a reconfigurable functional unit

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Concurrent Error Detection in Reed–Solomon Encoders and Decoders

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Low-power implementation of polyphase filters in Quadratic Residue Number system

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Error detection in signed digit arithmetic circuit with parity checker [adder example]

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2003, Proceedings 18th IEEE Symposium on Defect and Fault Tolerance in VLSI Systems.

Compressive sensing spectrum analysis for space autonomous radio receivers

Gian Carlo Cardarilli, Lorenzo Simone, Marco Re, 2013, 2013 Asilomar Conference on Signals, Systems and Computers.

Channel estimation for high speed unmanned aerial vehicle with STBC in MIMO radio links

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2018, Int. J. Comput. Vis. Robotics.

Fault localization, error correction, and graceful degradation in radix 2 signed digit-based adders

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2006, IEEE Transactions on Computers.

A signed digit adder with error correction and graceful degradation capabilities

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2004, Proceedings. 10th IEEE International On-Line Testing Symposium.

Karatsuba implementation of FIR filters

Salvatore Pontarelli, Gian Carlo Cardarilli, Marco Re, 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

VLSI implementation of a real time fuzzy processor

Roberto Lojacono, Gian Carlo Cardarilli, Marco Re, 1998, J. Intell. Fuzzy Syst..

Design and Requirements for a Mobile Robot for Team Cooperation

Marco Ceccarelli, Gian Carlo Cardarilli, Luca Di Nunzio, 2019 .

A Wireless Sensor Node Based on Microbial Fuel Cell

Gian Carlo Cardarilli, Simone Acciarito, Luca Di Nunzio, 2015, ApplePies.

Partial reconfiguration in the implementation of autonomous radio receivers for space

Gian Carlo Cardarilli, Lorenzo Simone, Marco Re, 2011, 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC).

Compressive Sensing Reconstruction for Complex System: A Hardware/Software Approach

Gian Carlo Cardarilli, Gaurav Mani Khanal, Simone Acciarito, 2016, ApplePies.

Efficient Implementation of a Demultiplexer Based on a Multirate Filter Bank for the Skyplex Satellites DVB System

Gian Carlo Cardarilli, Marco Re, Andrea Del Re, 2002, VLSI Design.

Error Correction Codes for SEU and SEFI Tolerant Memory Systems

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2009, 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Low-power adaptive filter based on RNS components

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Development of an evaluation model for the design of fault-tolerant solid state mass memory

Adelio Salsano, Gian Carlo Cardarilli, P. Marinucci, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

A Comparative Evaluation of Designs for Reliable Memory Systems

Fabrizio Lombardi, Marco Ottavi, Salvatore Pontarelli, 2005, J. Electron. Test..

A fault tolerant hardware based file system manager for solid state mass memory

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Tradeoffs between residue number system and traditional FIR filters

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

High Performance Bit-Stream Decompressor for Partial Reconfigurable FPGAs

Gian Carlo Cardarilli, Marco Re, Ilir Shuli, 2014, ApplePies.

Fine-grain Reconfigurable Functional Unit for embedded processors

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2011, 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2010, 2010 8th Workshop on Intelligent Solutions in Embedded Systems.

Optimization of Self Checking FIR filters by means of Fault Injection Analysis

Salvatore Pontarelli, Adelio Salsano, Massimo Violante, 2007, 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007).

Analysis of Errors and Erasures in Parity Sharing RS Codecs

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2007, IEEE Transactions on Computers.

A self-checking cell logic block for fault tolerant FPGAs

Marco Ottavi, Salvatore Pontarelli, A. Leandri, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

A new electric encoder position estimator based on the Chinese Remainder Theorem for the CMG performance improvements

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Design of a self checking Reed Solomon encoder

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2005, 11th IEEE International On-Line Testing Symposium.

Power efficient design of parallel/serial FIR filters in RNS

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving

Ruby B. Lee, Gian Carlo Cardarilli, Luca Di Nunzio, 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

Design of a fault tolerant solid state mass memory

Marco Ottavi, Salvatore Pontarelli, A. Leandri, 2003, IEEE Trans. Reliab..

FPGA implementation of a demux based on a multirate filter bank

Roberto Lojacono, Gian Carlo Cardarilli, Marco Re, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

A hardware framework for on-chip FPGA acceleration

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2016, 2016 International Symposium on Integrated Circuits (ISIC).

Failure tests on 64 Mb SDRAM in radiation environment

Marcello Salmeri, Gian Carlo Cardarilli, P. Marinucci, 1999, Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99).

Dynamically-loaded Hardware Libraries (HLL) technology for audio applications

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2016, 2016 50th Asilomar Conference on Signals, Systems and Computers.

Analysis and Evaluations of Reliability of Reconfigurable FPGAs

Fabrizio Lombardi, Marco Ottavi, Salvatore Pontarelli, 2008, J. Electron. Test..

Concurrent error detection in Reed Solomon decoders

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Letter limit cycles in residue number system filters

Martin Hasler, Gian Carlo Cardarilli, M. Hasler, 1992, Eur. Trans. Telecommun..

Totally Fault Tolerant RNS Based FIR Filters

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2008, 2008 14th IEEE International On-Line Testing Symposium.

A full-adder based reconfigurable architecture for fine grain applications: ADAPTO

Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

Imprecise arithmetic for low power image processing

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

Channel estimation for high speed unmanned aerial vehicle with STBC in MIMO radio links

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2018 .

Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion

Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli, Roberto Lojacono, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Setup and experimental results analysis of COTS Camera and SRAMs at the ISIS neutron facility

Marco Ottavi, Pedro Reviriego, Gian Carlo Cardarilli, 2018, 2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS).

RNS approach to fast dividers

Roberto Lojacono, Gian Carlo Cardarilli, Mario Salerno, 1989, International Conference on Acoustics, Speech, and Signal Processing,.

IP based reconfigurable digital platform for satellite communications

Gian Carlo Cardarilli, Marco Re, Andrea Del Re, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Merged Carrier and Timing Recovery Loops QPSK Demodulator based on Iterative Learning Control

Gian Carlo Cardarilli, Rocco Fazzolari, Marco Re, 2019, 2019 International Symposium on Signals, Circuits and Systems (ISSCS).

Power characterization of digital filters implemented on FPGA

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

High Dynamic Optimized Carrier Loop Improvement for Tracking Doppler Rates

Gian Carlo Cardarilli, Marco Re, Amirhossein Fereidountabar, 2015, J. Electr. Comput. Eng..

A Software Defined Radio Architecture for a Regenerative Onboard processor

Catherine Morlet, Gian Carlo Cardarilli, Marco Re, 2008, 2008 NASA/ESA Conference on Adaptive Hardware and Systems.

Truncated multipliers through power-gating for degrading precision arithmetic

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2013, 2013 Asilomar Conference on Signals, Systems and Computers.

A self checking Reed Solomon encoder: design and analysis

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2005, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05).

Digital Signal Processing Accelerator for RISC-V

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2019, 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

A Novel Error Detection and Correction Technique for RNS Based FIR Filters

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2008, 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems.

Hardware design of LIF with Latency neuron model with memristive STDP synapses pdf

Gian Carlo Cardarilli, Gaurav Mani Khanal, Simone Acciarito, 2017, Integr..

FPGA realization of RNS to binary signed conversion architecture

Roberto Lojacono, Gian Carlo Cardarilli, Marco Re, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams

Marco Ottavi, Gian Carlo Cardarilli, Luca Di Nunzio, 2016, 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Digital Architecture of Next Generation Spacecraft Tracker Based on Wideband ∆DOR

Gian Carlo Cardarilli, Lorenzo Simone, Dario Gelfusa, 2017, ApplePies.

Arithmetic/logic blocks for fine-grained reconfigurable units

Gian Carlo Cardarilli, Luca Di Nunzio, Marco Re, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Programmable power-of-two RNS scaler and its application to a QRNS polyphase filter

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2005, 2005 IEEE International Symposium on Circuits and Systems.

VLSI implementation of reconfigurable cells for RFU in embedded processors

Gian Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

Evaluating the data integrity of memory systems by configurable Markov models

Fabrizio Lombardi, Marco Ottavi, Salvatore Pontarelli, 2005, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05).

Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories]

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2004, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings..

Fault tolerant design of signed digit based FIR filters

Salvatore Pontarelli, Adelio Salsano, Gian Carlo Cardarilli, 2006, 2006 IEEE International Symposium on Circuits and Systems.

A Reconfigurable Functional Unit for Modular Operations

Salvatore Pontarelli, Gian Carlo Cardarilli, Luca Di Nunzio, 2013, ApplePies.

System-on-chip oriented fault-tolerant sequential systems implementation methodology

Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Multi-Agent Reinforcement Learning: A Review of Challenges and Applications

Gian Carlo Cardarilli, Rocco Fazzolari, Marco Re, 2021, Applied Sciences.

Structurally passive digital filters in residue number systems

Gian Carlo Cardarilli, R. Lojacono, Mario Salerno, 1988 .

Synaptic behaviour in ZnO–rGO composites thin film memristor

Gian Carlo Cardarilli, Gaurav Mani Khanal, Simone Acciarito, 2017 .

Properties and synthesis of RNS digital circuits

Gian Carlo Cardarilli, R. Lojacono, Mario Salerno, 1990 .

RNS adaptive lattice predictor

Gian Carlo Cardarilli, Mario Salerno, Giuseppe Martinelli, 1989 .

Multiple Constant Multiplication through Residue Number System

Gian Carlo Cardarilli, Marco Re, Alberto Nannarelli, 2009, 2009 Conference Record of the Forty-Third Asilomar Conference on Signals, Systems and Computers.

A finite arithmetic implementation of recursive digital filters

Gian Carlo Cardarilli, R. Lojacono, Mario Salerno, 1990, IEEE International Symposium on Circuits and Systems.

A neural network device for on-line particle identification in cosmic ray experiments

Gian Carlo Cardarilli, E. Segreto, M. Raso, 2004 .