P. Absil

发表

Silicon-organic hybrid fabrication platform for integrated circuits

P. Zakynthinos, C. Koos, W. Freude, 2012, 2012 14th International Conference on Transparent Optical Networks (ICTON).

Fast and Accurate Modelling of Large TSV Arrays in 3D-ICs Using a 3D Circuit Model Validated Against Full-Wave FEM Simulations and RF Measurements

E. Beyne, G. Van der Plas, M. Rack, 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

Selective Epitaxy of Si/SiGe to Improve pMOS Devices by Recessed Source/Drain and/or Buried SiGe Channels

Akira Inoue, Rita Rooyackers, Denis Shamiryan, 2006 .

Low-power, low-penalty, flip-chip integrated, 10Gb/s ring-based 1V CMOS photonics transmitter

M. Steyaert, Hui Yu, J. Ryckaert, 2013, 2013 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC).

Silicon-on-Insulator Polarization Rotator Based on a Symmetry Breaking Silicon Overlay

G. Roelkens, D. Van Thourhout, W. Bogaerts, 2012, IEEE Photonics Technology Letters.

Work function of Ni silicide phases on HfSiON and SiO/sub 2/: NiSi, Ni/sub 2/Si, Ni/sub 31/Si/sub 12/, and Ni/sub 3/Si fully silicided gates

C. Vrancken, A. Veloso, S. Biesemans, 2006, IEEE Electron Device Letters.

Demonstration of recessed SiGe S/D and inserted metal gate on HfO/sub 2/ for high performance pFETs.

R. Rooyackers, G. Eneman, S. Biesemans, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Low-voltage, low-loss, multi-Gb/s silicon micro-ring modulator based on a MOS capacitor

J. Wouters, J. Van Campenhout, W. Bogaerts, 2012, OFC/NFOEC.

Laser-annealed junctions with advanced CMOS gate stacks for 32nm Node: Perspectives on device performance and manufacturability

C. Ortolland, T. Chiarella, W. Vandervorst, 2008, 2008 Symposium on VLSI Technology.

High-mobility 0.85nm-EOT Si0.45Ge0.55-pFETs: Delivering high performance at scaled VDD

A. Mercha, L. Witters, J. Mitard, 2010, 2010 International Electron Devices Meeting.

Si photonic device uniformity improvement using wafer-scale location specific processing

J. Van Campenhout, W. Bogaerts, P. Absil, 2012, IEEE Photonics Conference 2012.

Full-field EUV and immersion lithography integration in 0.186μm2 FinFET 6T-SRAM cell

B. Parvais, R. Rooyackers, K. Ronse, 2008, 2008 IEEE International Electron Devices Meeting.

High yield sub-0.1µm2 6T-SRAM cells, featuring high-k/metal-gate finfet devices, double gate patterning, a novel fin etch strategy, full-field EUV lithography and optimized junction design & layout

K. Ronse, S. Locorotondo, V. Truffert, 2010, 2010 Symposium on VLSI Technology.

25% drive current improvement for p-type multiple gate FET (MuGFET) devices by the introduction of recessed Si/sub 0.8/Ge/sub 0.2/ in the source and drain regions

R. Rooyackers, N. Collaert, G. Eneman, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

8Å Tinv gate-first dual channel technology achieving low-Vt high performance CMOS

L. Witters, H. Bender, T. Chiarella, 2010, 2010 Symposium on VLSI Technology.

Silicon-Organic Hybrid MZI Modulator Generating OOK, BPSK and 8-ASK Signals for Up to 84 Gbit/s

C. Koos, W. Freude, P. C. Schindler, 2013, IEEE Photonics Journal.

CMP-less integration of fully Ni-silicided metal gates in FinFETs by simultaneous silicidation of the source, drain, and the gate using a novel dual hard mask approach

R. Rooyackers, B. Kaczer, S. Locorotondo, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

- 1 V Bias 67 GHz Bandwidth Si-Contacted Germanium Waveguide pi-n Photodetector for 56 Gbps Optical Links

G. Roelkens, J. De Coster, S. Balakrishnan, 2016 .

1mA/um-ION strained SiGe45%-IFQW pFETs with raised and embedded S/D

P. Eyben, G. Hellings, L. Witters, 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.

Silicon carrier-depletion-based Mach-Zehnder and ring modulators with different doping patterns for telecommunication and optical interconnect

D. Hillerkuss, D. Korn, J. Van Campenhout, 2012, 2012 14th International Conference on Transparent Optical Networks (ICTON).

CMOS-compatible Tungsten heaters for silicon photonic waveguides

D. Van Thourhout, W. Bogaerts, P. Verheyen, 2012, The 9th International Conference on Group IV Photonics (GFP).

Schottky-Barrier Height Lowering by an Increase of the Substrate Doping in PtSi Schottky Barrier Source/Drain FETs

E. Augendre, S. Biesemans, M. Jurczak, 2007, IEEE Electron Device Letters.

Lateral versus interdigitated diode design for 10 Gb/s low-voltage low-loss silicon ring modulators

J. Wouters, J. Van Campenhout, W. Bogaerts, 2012, 2012 Optical Interconnects Conference.

Detection or modulation at 35 Gbit/s with a standard CMOS-processed optical waveguide

C. Koos, W. Freude, D. Hillerkuss, 2012, 2012 Conference on Lasers and Electro-Optics (CLEO).

Reliability of Strained-Si Devices With Post-Oxide-Deposition Strain Introduction

E. San Andres, R. Degraeve, B. Kaczer, 2008, IEEE Transactions on Electron Devices.

Photonic integrated circuits in silicon-on-insulator

D. Van Thourhout, W. Bogaerts, P. Absil, 2010, 2010 IEEE International SOI Conference (SOI).

Dual Work Function Phase Controlled Ni-FUSI CMOS (NiSi NMOS, Ni2Si or Ni31Si12 PMOS): Manufacturability, Reliability & Process Window Improvement by Sacrificial SiGe Cap

S. Locorotondo, H. Bender, T. Chiarella, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Ultra low-EOT (5 Å) gate-first and gate-last high performance CMOS achieved by gate-electrode optimization

B. Parvais, S. Biesemans, T. Schram, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

100-Gbps RZ Data Reception in 67-GHz Si-Contacted Germanium Waveguide p-i-n Photodetectors

G. Roelkens, J. De Coster, S. Balakrishnan, 2017, Journal of Lightwave Technology.

Low VT CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only Anneal

S. De Gendt, S. Van Elshocht, A. Akheyar, 2007, 2007 IEEE International Electron Devices Meeting.

56Gb/s ring modulator on a 300mm silicon photonics platform

J. De Coster, J. Van Campenhout, P. Verheyen, 2015, 2015 European Conference on Optical Communication (ECOC).

Negligible Effect of Process-Induced Strain on Intrinsic NBTI Behavior

B. Kaczer, G. Eneman, G. Groeseneken, 2007, IEEE Electron Device Letters.

Strain Enhanced nMOS Using In Situ Doped Embedded $\hbox{Si}_{1 - x}\hbox{C}_{x}$ S/D Stressors With up to 1.5% Substitutional Carbon Content Grown Using a Novel Deposition Process

H. Bender, S. Biesemans, D. Shamiryan, 2008, IEEE Electron Device Letters.

Low Vt Ni-FUSI CMOS Technology using a DyO cap layer with either single or dual Ni-phases

S. Van Elshocht, P. Lehnen, C. Vrancken, 2007, 2007 IEEE Symposium on VLSI Technology.

On the origin of the mobility reduction in bulk-Si, UTBOX-FDSOI and SiGe devices with ultrathin-EOT dielectrics

N. Collaert, J. Mitard, M. Jurczak, 2011, Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications.

Comparison of Silicon Ring Modulators With Interdigitated and Lateral p-n Junctions

J. Van Campenhout, Hui Yu, P. Verheyen, 2013, IEEE Journal of Selected Topics in Quantum Electronics.

Silicon-organic hybrid (SOH) IQ modulator for 16QAM at 112 Gbit/s

C. Koos, W. Freude, P. C. Schindler, 2013, 2013 Conference on Lasers & Electro-Optics Europe & International Quantum Electronics Conference CLEO EUROPE/IQEC.

Doping geometries for 40G carrier-depletion-based silicon optical modulators

C. Koos, W. Freude, D. Hillerkuss, 2012, OFC/NFOEC.

Reliable 50Gb/s silicon photonics platform for next-generation data center optical interconnects

J. De Coster, S. Balakrishnan, K. Croes, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

The Impact of Stacked Cap Layers on Effective Work Function With HfSiON and SiON Gate Dielectrics

S. Van Elshocht, A. Akheyar, S. Biesemans, 2008, IEEE Electron Device Letters.

Real-time 100 Gb/s NRZ-OOK transmission with a silicon photonics GeSi electro-absorption modulator

J. Verbist, J. Bauwelinck, G. Roelkens, 2017, 2017 IEEE Optical Interconnects Conference (OI).

Demonstration of scaled 0.099µm2 FinFET 6T-SRAM cell using full-field EUV lithography for (Sub-)22nm node single-patterning technology

R. Rajagopalan, K. Ronse, S. Locorotondo, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

25-Gb/s 1310-nm Optical Receiver Based on a Sub-5-V Waveguide-Coupled Germanium Avalanche Photodiode

B. Moeneclaey, J. Verbist, J. Bauwelinck, 2015, IEEE Photonics Journal.

Optimization of Sub-Melt Laser Anneal: Performance and Reliability

S. Mahapatra, S. Severi, L. Pantisano, 2006, 2006 International Electron Devices Meeting.

Investigation of TSV noise coupling in 3D-ICs using an experimental validated 3D TSV circuit model including Si substrate effects and TSV capacitance inversion behavior after wafer thinning

E. Beyne, J. De Vos, G. Van der Plas, 2016, 2016 IEEE MTT-S International Microwave Symposium (IMS).

Compact Thermally Tunable Silicon Racetrack Modulators Based on an Asymmetric Waveguide

J. Van Campenhout, W. Bogaerts, Hui Yu, 2013, IEEE Photonics Technology Letters.

CMOS integration of dual work function phase controlled Ni FUSI with simultaneous silicidation of NMOS (NiSi) and PMOS (Ni-rich silicide) gates on HfSiON

S. Locorotondo, T. Chiarella, C. Vrancken, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..