M. Bhattacharya

Augmentation of SPICE for simulation of circuits containingresonant tunneling diodes

Pinaki Mazumder, Mayukh Bhattacharya, P. Mazumder, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Standard CMOS implementation of a multiple-valued logic signed-digit adder based on negative differential-resistance devices

Pinaki Mazumder, Alejandro F. González, Mayukh Bhattacharya, 2000, Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000).

Digital circuit applications of resonant tunneling devices

Pinaki Mazumder, M. Bhattacharya, George I. Haddad, 1998, Proc. IEEE.

A Structured Approach for Rapid Identification of Fault-Sensitive Nets in Analog Circuits

Amit Patra, Pallab Dasgupta, Sayandeep Sanyal, 2019, 2019 IEEE 28th Asian Test Symposium (ATS).

A physical design tool for built-in self-repairable RAMs

Pinaki Mazumder, Anurag Gupta, Kanad Chakraborty, 2001, IEEE Trans. Very Large Scale Integr. Syst..