Ya-Shih Huang

Throughput-driven hierarchical placement for two-dimensional regular multicycle communication architecture

Juinn-Dar Huang, Ya-Shih Huang, Juinn-Dar Huang, 2010, 2nd Asia Symposium on Quality Electronic Design (ASQED).

TherWare: Thermal-Aware Placement and Routing Framework for 3D FPGAs with Location-Based Heat Balance

Juinn-Dar Huang, Ya-Shih Huang, Han-Yuan Chang, 2015, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A multicycle communication architecture and synthesis flow for Global interconnect Resource Sharing

Juinn-Dar Huang, Wei-Sheng Huang, Ya-Shih Huang, 2008, 2008 Asia and South Pacific Design Automation Conference.

Simultaneous data transfer routing and scheduling for interconnect minimization in multicycle communication architecture

Juinn-Dar Huang, Ya-Shih Huang, Yu-Ju Hong, 2009, 2009 Asia and South Pacific Design Automation Conference.

Thermal-aware logic block placement for 3D FPGAs considering lateral heat dissipation (abstract only)

Juinn-Dar Huang, Ya-Shih Huang, Han-Yuan Chang, 2012, FPGA '12.

Communication Synthesis for Interconnect Minimization in Multicycle Communication Architecture

Juinn-Dar Huang, Ya-Shih Huang, Yu-Ju Hong, 2009, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Layer-Aware Design Partitioning for Vertical Interconnect Minimization

Juinn-Dar Huang, Ya-Shih Huang, Yang-Hsiang Liu, 2011, 2011 IEEE Computer Society Annual Symposium on VLSI.