Olivier Ginez

A High-Speed Structural Method for Testing Address Decoder Faults in Flash Memories

Jean Michel Portal, Hassen Aziza, Olivier Ginez, 2008, 2008 IEEE International Test Conference.

Design and Test Challenges in Resistive Switching RAM (ReRAM): An Electrical Model for Defect Injections

Jean Michel Portal, Christophe Muller, Olivier Ginez, 2009, 2009 14th IEEE European Test Symposium.

An overview of failure mechanisms in embedded flash memories

Arnaud Virazel, Patrick Girard, Serge Pravossoudovitch, 2006, 24th IEEE VLSI Test Symposium.

Design challenges for prototypical and emerging memory concepts relying on resistance switching

Jean Michel Portal, Marc Bocquet, Christophe Muller, 2011, 2011 IEEE Custom Integrated Circuits Conference (CICC).

A Novel Low Power Oriented Design Methodology for Analog Blocks

Jean Michel Portal, Hassen Aziza, Emmanuel Bergeret, 2008, J. Low Power Electron..

Fault Modeling and Testing of Flash Memories

Olivier Ginez, O. Ginez, 2007 .

A SPICE-Like 2T-FLOTOX Core-Cell Model for Defect Injection and Faulty Behavior Prediction in eFlash

Arnaud Virazel, Patrick Girard, Serge Pravossoudovitch, 2009, J. Electron. Test..

Emerging Memory Concepts

Damien Deleruyelle, Olivier Ginez, Christophe Muller, 2012 .

Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window

Arnaud Virazel, Patrick Girard, Serge Pravossoudovitch, 2007, 25th IEEE VLSI Test Symposium (VTS'07).

An on-line testing scheme for repairing purposes in Flash memories

Jean Michel Portal, Hassen Aziza, Olivier Ginez, 2009, 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories

Arnaud Virazel, Patrick Girard, Serge Pravossoudovitch, 2007, 12th IEEE European Test Symposium (ETS'07).