Jan Kastil

Hardware accelerated pattern matching based on Deterministic Finite Automata with perfect hashing

Jan Korenek, Jan Kastil, J. Korenek, 2010, 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.

SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems

Zdenek Kotásek, Martin Straka, Jan Kastil, 2011, 2011 14th Euromicro Conference on Digital System Design.

Generic partial dynamic reconfiguration controller for fault tolerant designs based on FPGA

Martin Straka, Zdenek Kotasek, Jan Kastil, 2010, NORCHIP 2010.