Marcus Jeitler

Speeding up Fault Injection for Asynchronous Logic by FPGA-Based Emulation

Jakob Lechner, Marcus Jeitler, 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

Low Latency Recovery from Transient Faults for Pipelined Processor Architectures

Jakob Lechner, Marcus Jeitler, M. Jeitler, 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

Enhancing pipelined processor architectures with fast autonomous recovery of transient faults

Andreas Steininger, Jakob Lechner, Marcus Jeitler, 2010, 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems.

Towards Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault Injection

Jakob Lechner, Marcus Jeitler, 2009, MEMICS.

FuSE - a hardware accelerated HDL fault injection tool

Marcus Jeitler, Martin Delvai, Stefan Reichor, 2009, 2009 5th Southern Conference on Programmable Logic (SPL).