ShrivastavaAviral

发表

High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures

KimYongjoo, PaekYunheung, ChoDoosan, 2011 .

Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs

DuttNikil, MishraPrabhat, ShrivastavaAviral, 2004 .

A compiler-microarchitecture hybrid approach to soft error reduction for register files

LeeJongeun, ShrivastavaAviral, 2010 .

Memory access optimization in compilation for coarse-grained reconfigurable architectures

KimYongjoo, PaekYunheung, LeeJongeun, 2011 .

Partitioning techniques for partially protected caches in resource-constrained embedded systems

DuttNikil, LeeKyoungwoo, VenkatasubramanianNalini, 2010 .

Software-based register file vulnerability reduction for embedded processors

LeeJongeun, ShrivastavaAviral, 2013 .

A software-only scheme for managing heap data on limited local memory(LLM) multicore processors

ShrivastavaAviral, BaiKe, 2013 .

Enabling energy efficient reliability in embedded systems through smart cache cleaning

ShrivastavaAviral, JeyapaulReiley, 2013 .

A Software Scheme for Multithreading on CGRAs

ShrivastavaAviral, JeyapaulReiley, PagerJared, 2015 .

WCET-Aware Function-Level Dynamic Code Management on Scratchpad Memory

ShrivastavaAviral, BromanDavid, KimYooseong, 2017 .

Cache vulnerability equations for protecting data in embedded processor caches from soft errors

LeeJongeun, ShrivastavaAviral, JeyapaulReiley, 2010 .

Protecting Caches from Soft Errors

KoYohan, LeeKyoungwoo, ShrivastavaAviral, 2017 .

Introduction to the Special Issue on Languages, Compilers, Tools, and Theory of Embedded Systems

ZhangYoutao, ChenJian-Jia, ShrivastavaAviral, 2020 .

A compiler optimization to reduce soft errors in register files

LeeJongeun, ShrivastavaAviral, 2009 .