Chip-Hong Chang

发表

Highly reliable memory-based Physical Unclonable Function using Spin-Transfer Torque MRAM

Chip-Hong Chang, Kaushik Roy, Le Zhang, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

IP Watermarking Using Incremental Technology Mapping at Logic Synthesis Level

Sofiène Tahar, Chip-Hong Chang, Aijiao Cui, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Field programable gate array based architecture for real time image segmentation by region growing algorithm

Chip-Hong Chang, Hui Tian, Thambipillai Srikanthan, 2002, J. Electronic Imaging.

Design and Implementation of High-Quality Physical Unclonable Functions for Hardware-Oriented Cryptography

Chip-Hong Chang, A. A. Ivaniuk, Siarhei S. Zalivaka, 2016 .

Design of an area-efficient CMOS multiple-valued current comparator circuit

Chip-Hong Chang, Kiat Seng Yeo, Zhi Hui Kong, 2005 .

An energy-efficient true random number generator based on current starved ring oscillators

Chip-Hong Chang, Yue Zheng, Xiaojin Zhao, 2017, 2017 Asian Hardware Oriented Security and Trust Symposium (AsianHOST).

Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits

Chip-Hong Chang, Mingyan Zhang, Jiangmin Gu, 2004, IEEE Trans. Circuits Syst. I Regul. Pap..

New efficient residue-to-binary converters for 4-moduli set {2/sup n/ - 1, 2/sup n/, 2/sup n/ + 1, 2/sup n+1/ - 1}

Chip-Hong Chang, Bin Cao, Thambipillai Srikanthan, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Time-multiplexed data flow graph for the design of configurable multiplier block

Chip-Hong Chang, Jiajia Chen, Ching-Chuen Jong, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A novel scheme for information hiding at physical layer of wireless communications

Chip-Hong Chang, Sumedh Dhabu, 2017, 2017 International SoC Design Conference (ISOCC).

VLSI Performance Evaluation and Analysis of Systolic and Semisystolic Finite Field Multipliers

Chip-Hong Chang, Ravi Kumar Satzoda, 2005, Asia-Pacific Computer Systems Architecture Conference.

Obfuscation and watermarking of FPGA designs based on constant value generators

Chip-Hong Chang, Alexander A. Ivaniuk, Vladimir V. Sergeichik, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

Low-power differential coefficients-based FIR filters using hardware-optimised multipliers

Chip-Hong Chang, A. Prasad Vinod, Ankita Singla, 2007, IET Circuits Devices Syst..

A new scheme for secret-hiding in DSP circuits

Chip-Hong Chang, Sumedh Dhabu, 2016, 2016 International SoC Design Conference (ISOCC).

Stego-signature at logic synthesis level for digital design IP protection

Chip-Hong Chang, Aijiao Cui, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Efficient structural adder pipelining in transposed form FIR filters

Mathias Faust, Chip-Hong Chang, Peter Zipf, 2015, 2015 IEEE International Conference on Digital Signal Processing (DSP).

Base Transformation With Injective Residue Mapping for Dynamic Range Reduction in RNS

Chip-Hong Chang, Leonel Sousa, Thian Fatt Tay, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Highly Reliable Spin-Transfer Torque Magnetic RAM-Based Physical Unclonable Function With Multi-Response-Bits Per Cell

Chip-Hong Chang, Kaushik Roy, Xuanyao Fong, 2015, IEEE Transactions on Information Forensics and Security.

Sizing of SRAM Cell with Voltage Biasing Techniques for Reliability Enhancement of Memory and PUF Functions

Chip-Hong Chang, Zhi Hui Kong, Chao Qun Liu, 2016 .

Intellectual property authentication by watermarking scan chain in design-for-testability flow

Chip-Hong Chang, Aijiao Cui, 2008, 2008 IEEE International Symposium on Circuits and Systems.

Radix-4 and Radix-8 Booth Encoded Multi-Modulus Multipliers

Chip-Hong Chang, Ramya Muralidharan, Chip-Hong Chang, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Pragmatic Per-Device Licensing Scheme for Hardware IP Cores on SRAM-Based FPGAs

Chip-Hong Chang, Li Zhang, 2014, IEEE Transactions on Information Forensics and Security.

UDhashing: Physical Unclonable Function-Based User-Device Hash for Endpoint Authentication

Chip-Hong Chang, Yue Zheng, Yuan Cao, 2019, IEEE Transactions on Industrial Electronics.

A High Bit Rate Serial-Serial Multiplier With On-the-Fly Accumulation by Asynchronous Counters

Chip-Hong Chang, Ching-Chuen Jong, Manas Ranjan Meher, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A review of 0.18-/spl mu/m full adder performances for tree structured arithmetic circuits

Chip-Hong Chang, Mingyan Zhang, Jiangmin Gu, 2005 .

An improved publicly detectable watermarking scheme based on scan chain ordering

Chip-Hong Chang, Aijiao Cui, 2009, 2009 IEEE International Symposium on Circuits and Systems.

FPGA implementation of modeling attack resistant arbiter PUF with enhanced reliability

Chip-Hong Chang, Siarhei S. Zalivaka, Alexander A. Ivaniuk, 2017, 2017 18th International Symposium on Quality Electronic Design (ISQED).

Performance evaluation of direct form FIR filter with merged arithmetic architecture

Chip-Hong Chang, Udit Sharma, Ravi Kumar Satzoda, 2004, Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications.

Low voltage, low power (5:2) compressor cell for fast arithmetic circuits

Chip-Hong Chang, Jiangmin Gu, Chip-Hong Chang, 2003, 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03)..

An interconnect optimized floorplanning of a scalar product macrocell

Chip-Hong Chang, Kiat Seng Yeo, Jiangmin Gu, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Towards Ideal Lattice-Based Cryptography on ASIC: A Custom Implementation of Number Theoretic Transform

Chip-Hong Chang, Truong Phu Truan Ho, Chip-Hong Chang, 2018, 2018 IEEE 23rd International Conference on Digital Signal Processing (DSP).

Securing IoT Monitoring Device using PUF and Physical Layer Authentication

Chip-Hong Chang, Yue Zheng, Sumedh Somnath Dhabu, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A New PUF Based Lock and Key Solution for Secure In-Field Testing of Cryptographic Chips

Chip-Hong Chang, Wei Zhou, Yue Zheng, 2019, IEEE Transactions on Emerging Topics in Computing.

A VLSI-efficient signed magnitude comparator for { 2n-1, 2n, 2n +2n+1-1} RNS

Chip-Hong Chang, Sachin Kumar, Chip-Hong Chang, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

A high-speed and area-efficient sign detector for three moduli set RNS {2n, 2n-1, 2n+1}

Chip-Hong Chang, Sachin Kumar, Chip-Hong Chang, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A new watermarking scheme on scan chain ordering for hard IP protection

Chip-Hong Chang, Aijiao Cui, Xiaonan Huang, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

A modified reduced adder graph algorithm for multiplier block minimization in digital filters

Chip-Hong Chang, Fei Xu, Jiajia Chen, 2004, The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings..

A new integrated approach to the design of low-complexity FIR filters

Chip-Hong Chang, Fei Xu, Ching-Chuen Jong, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Design of programmable FIR filters using Canonical Double Based Number Representation

Chip-Hong Chang, Jiajia Chen, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Design of High-speed, Low-power FIR Filters with Fine-grained Cost Metrics

Chip-Hong Chang, A. Prasad Vinod, Jiajia Chen, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

A MSB-biased self-organizing feature map for still color image compression

Chip-Hong Chang, Thambipillai Srikanthan, Rui Xiao, 2002, Asia-Pacific Conference on Circuits and Systems.

A low-power, high-speed RB-to-NB converter for fast redundant binary multiplier

Chip-Hong Chang, Yajuan He, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Efficient VLSI Implementation of $2^{{n}}$ Scaling of Signed Integer in RNS ${\{2^{n}-1, 2^{n},2^{n}+1\}}$

Chip-Hong Chang, Thian Fatt Tay, Jeremy Yung Shern Low, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings

Chip-Hong Chang, Thambipillai Srikanthan, Jingling Xue, 2005, Asia-Pacific Computer Systems Architecture Conference.

ASHES 2017: Workshop on Attacks and Solutions in Hardware Security

Chip-Hong Chang, Mark Mohammad Tehranipoor, Ulrich Rührmair, 2017, CCS.

Area-Power Efficient Modulo 2n-1 and Modulo 2n+1 Multipliers for {2n-1, 2n, 2n+1} Based RNS

Chip-Hong Chang, Ramya Muralidharan, 2012, IEEE Trans. Circuits Syst. I Regul. Pap..

A unified {2n−1, 2n, 2n+1} RNS scaler with dual scaling constants

Chip-Hong Chang, Thian Fatt Tay, Jeremy Yung Shern Low, 2012, 2012 IEEE Asia Pacific Conference on Circuits and Systems.

Programmable LSB-first and MSB-first modular multipliers for ECC in GF(2m)

Chip-Hong Chang, Ravi Kumar Satzoda, Ramya Muralidharan, 2008, 2008 IEEE International Symposium on Circuits and Systems.

An adaptive initialization technique for color quantization by self organizing feature map

Chip-Hong Chang, Thambipillai Srikanthan, Rui Xiao, 2003, 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03)..

A new contention resolution algorithm for the design of minimal logic depth multiplierless filters

Chip-Hong Chang, Fei Xu, Ching-Chuen Jong, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Watermarking for IP Protection through Template Substitution at Logic Synthesis Level

Chip-Hong Chang, Aijiao Cui, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Design and Evaluation of Booth-Encoded Multipliers in Redundant Binary Representation

Chip-Hong Chang, Yajuan He, Jiaxing Yang, 2017 .

Proceedings of the 2017 Workshop on Attacks and Solutions in Hardware Security

Chip-Hong Chang, Ulrich Rührmair, Wei Zhang, 2017, ASHES@CCS.

A New Cost-Aware Sensitivity-Driven Algorithm for the Design of FIR Filters

Chip-Hong Chang, Jiajia Chen, Feng Feng, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Fully Digital Physical Unclonable Function Based Temperature Sensor for Secure Remote Sensing

Wei Ge, Chip-Hong Chang, Min Zhu, 2018, 2018 27th International Conference on Computer Communication and Networks (ICCCN).

HWP: a new insight into canonical signed digit

Chip-Hong Chang, Fei Xu, Ching-Chuen Jong, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

A new method for eye extraction from facial image

Chip-Hong Chang, Xiaoyun Deng, Erwin Brandle, 2004, Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications.

Fuzzy-ART based digital watermarking scheme

Chip-Hong Chang, Mingyan Zhang, Zhi Ye, 2002, Asia-Pacific Conference on Circuits and Systems.

Forward and Inverse Transformations Between Haar Spectra and Ordered Binary Decision Diagrams of Boolean Functions

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1997, IEEE Trans. Computers.

A Blind Dynamic Fingerprinting Technique for Sequential Circuit Intellectual Property Protection

Chip-Hong Chang, Li Zhang, Chip-Hong Chang, 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A Current Comparator Based Physical Unclonable Function with High Reliability and Energy Efficiency

Chip-Hong Chang, Qiang Zhao, Xiaojin Zhao, 2018, 2018 IEEE 23rd International Conference on Digital Signal Processing (DSP).

Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory

Rolf Drechsler, Chip-Hong Chang, Chulwoo Kim, 2019, IEEE Trans. Very Large Scale Integr. Syst..

Wavelet transform to hybrid support vector machine and hidden Markov model for speech recognition

Chip-Hong Chang, Yu Shao, Chip-Hong Chang, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A Sub-pico Joules Per Bit Robust Physical Unclonable Function Based on Subthreshold Voltage References

Chip-Hong Chang, Xiaojin Zhao, Yuan Cao, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

Hamming weight pyramid - A new insight into canonical signed digit representation and its applications

Chip-Hong Chang, Fei Xu, Ching-Chuen Jong, 2007, Comput. Electr. Eng..

A 0.7 V low-power fully programmable Gaussian function generator for brain-inspired Gaussian correlation associative memory

Chip-Hong Chang, Fei Li, Arindam Basu, 2014, Neurocomputing.

Generation of multi-polarity arithmetic transform from reduced representation of Boolean functions

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

Information Theoretic Approach to Complexity Reduction of FIR Filter Design

Chip-Hong Chang, A. Prasad Vinod, Jiajia Chen, 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

A post-processing scan-chain watermarking scheme for VLSI intellectual property protection

Chip-Hong Chang, Aijiao Cui, 2012, 2012 IEEE Asia Pacific Conference on Circuits and Systems.

Dynamical Systems Guided Design and Analysis of Silicon Oscillators for Central Pattern Generators

Chip-Hong Chang, Fei Li, Arindam Basu, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

Simple, Fast, and Exact RNS Scaler for the Three-Moduli Set $\{2^{n} - 1, 2^{n}, 2^{n} + 1\}$

Chip-Hong Chang, Jeremy Yung Shern Low, 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

A new write-contention based dual-port SRAM PUF with multiple response bits per cell

Chip-Hong Chang, Yue Zheng, Chao Qun Liu, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

A new formulation of fast diminished-one multioperand modulo 2/sup n/+1 adder

Chip-Hong Chang, Bin Cao, Thambipillai Srikanthan, 2005, 2005 IEEE International Symposium on Circuits and Systems.

State encoding watermarking for field authentication of sequential circuit intellectual property

Chip-Hong Chang, Li Zhang, Chip-Hong Chang, 2012, 2012 IEEE International Symposium on Circuits and Systems.

A new unified modular adder/subtractor for arbitrary moduli

Chip-Hong Chang, Thian Fatt Tay, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Novel Design Algorithm for Low Complexity Programmable FIR Filters Based on Extended Double Base Number System

Chip-Hong Chang, Jiajia Chen, Feng Feng, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Using image sensor PUF as root of trust for birthmarking of perceptual image hash

Chip-Hong Chang, Le Zhang, Yuan Cao, 2016, 2016 IEEE Asian Hardware-Oriented Security and Trust (AsianHOST).

A novel hybrid neuro-wavelet system for robust speech recognition

Chip-Hong Chang, Yu Shao, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Optimization of structural adders in fixed coefficient transposed direct form FIR filters

Mathias Faust, Chip-Hong Chang, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Local search method for FIR filter coefficients synthesis

Chip-Hong Chang, Zhi Ye, Chip-Hong Chang, 2004, Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications.

Optimization of partially-mixed-polarity Reed-Muller expansions

Chip-Hong Chang, Bogdan J. Falkowski, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

A Cluster-Based Distributed Active Current Sensing Circuit for Hardware Trojan Detection

Chip-Hong Chang, Shoushun Chen, Yuan Cao, 2014, IEEE Transactions on Information Forensics and Security.

I/sup 2/CRA: contention resolution algorithm for intra- and inter-coefficient common subexpression elimination

Chip-Hong Chang, Fei Xu, Ching-Chuen Jong, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A New Paradigm of Common Subexpression Elimination by Unification of Addition and Subtraction

Chip-Hong Chang, Jiajia Chen, Jiatao Ding, 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A Reconfigurable Multi-Modulus Modulo Multiplier

Chip-Hong Chang, Shibu Menon, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

New power index model for switching power analysis from adder graph of FIR filter

Chip-Hong Chang, Jiajia Chen, Hanhua Qian, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Efficient algorithms for the calculation of arithmetic spectrum from OBDD and synthesis of OBDD from arithmetic spectrum for incompletely specified Boolean functions

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

Sign-Extension Avoidance and Word-Length Optimization by Positive-Offset Representation for FIR Filter Design

Mathias Faust, Chip-Hong Chang, Yiannos Manoli, 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.

PCKGen: A Phase Change Memory based cryptographic key generator

Chip-Hong Chang, Zhi-Hui Kong, Le Zhang, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

Static and Dynamic Obfuscations of Scan Data Against Scan-Based Side-Channel Attacks

Chip-Hong Chang, Aijiao Cui, Yanhui Luo, 2017, IEEE Transactions on Information Forensics and Security.

Boolean Matching Filters Based on Row and Column Weights of Reed-Muller Polarity Coefficient Matrix

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 2002, VLSI Design.

Fast hard multiple generators for radix-8 Booth encoded modulo 2n−1 and modulo 2n+1 multipliers

Chip-Hong Chang, Ramya Muralidharan, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

A non-iterative multiple residue digit error detection and correction algorithm in RRNS

Chip-Hong Chang, Thian Fatt Tay, Chip-Hong Chang, 2016, IEEE Transactions on Computers.

CMOS Image Sensor Based Physical Unclonable Function for Coherent Sensor-Level Authentication

Chip-Hong Chang, Shoushun Chen, Le Zhang, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

A compact current mode neuron circuit with Gaussian taper learning capability

Chip-Hong Chang, Fei Li, Liter Siek, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A new design method to modulo 2/sup n/-1 squaring

Chip-Hong Chang, Bin Cao, Thambipillai Srikanthan, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Hypergraph Based Minimum Arborescence Algorithm for the Optimization and Reoptimization of Multiple Constant Multiplications

Chip-Hong Chang, Jiajia Chen, Feng Feng, 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

Current mirror array: A novel lightweight strong PUF topology with enhanced reliability

Chip-Hong Chang, Arindam Basu, Yi Chen, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

A Retrospective and a Look Forward: Fifteen Years of Physical Unclonable Function Advancement

Chip-Hong Chang, Le Zhang, Yue Zheng, 2017, IEEE Circuits and Systems Magazine.

Contention resolution algorithm for common subexpression elimination in digital filter design

Chip-Hong Chang, Fei Xu, Ching-Chuen Jong, 2005, IEEE Trans. Circuits Syst. II Express Briefs.

Active IC Metering of Digital Signal Processing Subsystem with Two-Tier Activation for Secure Split Test

Chip-Hong Chang, Yue Zheng, Wenye Liu, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

An Area and Energy Efficient Inner-Product Processor for Serial-Link Bus Architecture

Chip-Hong Chang, Ching-Chuen Jong, Manas Ranjan Meher, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

Design of Low-Complexity FIR Filters Based on Signed-Powers-of-Two Coefficients With Reusable Common Subexpressions

Chip-Hong Chang, Fei Xu, Ching-Chuen Jong, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A novel hybrid pass logic with static CMOS output drive full-adder cell

Chip-Hong Chang, Mingyan Zhang, Jiangmin Gu, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Emerging Attacks and Solutions for Secure Hardware in the Internet of Things

Chip-Hong Chang, Ulrich Rührmair, Marten van Dijk, 2019, IEEE Trans. Dependable Secur. Comput..

Low-cost fortification of arbiter PUF against modeling attack

Chip-Hong Chang, Siarhei S. Zalivaka, Alexander A. Ivaniuk, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Fuzzy-ART based adaptive digital watermarking scheme

Chip-Hong Chang, Mingyan Zhang, Zhi Ye, 2005, IEEE Transactions on Circuits and Systems for Video Technology.

A novel multiplexer based truncated array multiplier

Chip-Hong Chang, Ravi Kumar Satzoda, Swaminathan Sekar, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Public key protocol for usage-based licensing of FPGA IP cores

Chip-Hong Chang, Li Zhang, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Hardware IP Watermarking and Fingerprinting

Chip-Hong Chang, Miodrag Potkonjak, Li Zhang, 2016 .

A low-voltage, low power STDP synapse implementation using domain-wall magnets for spiking neural networks

Chip-Hong Chang, Kaushik Roy, Xuanyao Fong, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Reed-Muller weight and literal vectors for NPN classification

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Low Power FIR Filter Realization Using Minimal Difference Coefficients: Part II - Algorithm

Chip-Hong Chang, A. Prasad Vinod, Pramod Kumar Meher, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

Minimal Logic Depth adder tree optimization for Multiple Constant Multiplication

Mathias Faust, Chip-Hong Chang, Chip-Hong Chang, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Radix-8 Booth Encoded Modulo $2 ^{n} -1$ Multipliers With Adaptive Delay for High Dynamic Range Residue Number System

Chip-Hong Chang, Ramya Muralidharan, Chip-Hong Chang, 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

High-Level Synthesis Algorithm for the Design of Reconfigurable Constant Multiplier

Chip-Hong Chang, Jiajia Chen, 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Shift‐Add Circuits for Constant Multiplications

Chip-Hong Chang, Oscar Gustafsson, Pramod Kumar Meher, 2017 .

Facial biohashing based user-device physical unclonable function for bring your own device security

Chip-Hong Chang, Yue Zheng, Yuan Cao, 2018, 2018 IEEE International Conference on Consumer Electronics (ICCE).

Area-efficient and fast sign detection for four-moduli set RNS {2n −1,2n, 2n +1,22n +1}

Chip-Hong Chang, Sachin Kumar, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

A new RNS scaler for {2n − 1, 2n, 2n + 1}

Chip-Hong Chang, Jeremy Yung Shern Low, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Hardware Trojan detection with linear regression based gate-level characterization

Chip-Hong Chang, Li Zhang, 2014, 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

Self-organizing topological tree for online vector quantization and data clustering

Chip-Hong Chang, Pengfei Xu, Andrew P. Paplinski, 2005, IEEE Transactions on Systems, Man, and Cybernetics, Part B (Cybernetics).

Contention Resolution—A New Approach to Versatile Subexpressions Sharing in Multiple Constant Multiplications

Chip-Hong Chang, Fei Xu, Ching-Chuen Jong, 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

Emerging Technology and Architecture for Big-data Analytics

Chip-Hong Chang, Hao Yu, Anupam Chattopadhyay, 2017 .

New adaptive color quantization method based on self-organizing maps

Chip-Hong Chang, Pengfei Xu, Thambipillai Srikanthan, 2005, IEEE Transactions on Neural Networks.

Maximum likelihood disjunctive decomposition to reduced multirooted DAG for FIR filter design

Chip-Hong Chang, A. Prasad Vinod, Jiajia Chen, 2006, 2006 IEEE International Symposium on Circuits and Systems.

A VLSI Efficient Programmable Power-of-Two Scaler for $\{2^{n}-1,2^{n},2^{n}+1\}$ RNS

Chip-Hong Chang, Jeremy Yung Shern Low, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

A modular design of elliptic-curve point multiplication for resource constrained devices

Chip-Hong Chang, Li Zhang, Wei Wei, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion

Chip-Hong Chang, Howard Tang, Liter Siek, 2012, 2012 IEEE Asia Pacific Conference on Circuits and Systems.

Pipelined adder graph optimization for high speed multiple constant multiplication

Mathias Faust, Chip-Hong Chang, Peter Zipf, 2012, 2012 IEEE International Symposium on Circuits and Systems.

Minimization of k-Variable-Mixed-Polarity Reed-Muller Expansions

Chip-Hong Chang, Bogdan J. Falkowski, 2000, VLSI Design.

A new algorithm for single residue digit error correction in Redundant Residue Number System

Chip-Hong Chang, Thian Fatt Tay, Chip-Hong Chang, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Efficient algorithms for common subexpression elimination in digital filter design

Chip-Hong Chang, Fei Xu, Ching-Chuen Jong, 2004, 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing.

CMOS image sensor based physical unclonable function for smart phone security applications

Chip-Hong Chang, Shoushun Chen, Le Zhang, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

Design of residue-to-binary converter for a new 5-moduli superset residue number system

Chip-Hong Chang, Bin Cao, Thambipillai Srikanthan, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Cyber-Physical Thermal Management of 3D Multi-Core Cache-Processor System with Microfluidic Cooling

Chip-Hong Chang, Hao Yu, Xiwei Huang, 2011, J. Low Power Electron..

Bayesian Separation With Sparsity Promotion in Perceptual Wavelet Domain for Speech Enhancement and Hybrid Speech Recognition

Chip-Hong Chang, Yu Shao, Chip-Hong Chang, 2011, IEEE Transactions on Systems, Man, and Cybernetics - Part A: Systems and Humans.

A New Redundant Binary Booth Encoding for Fast $2^{n}$-Bit Multiplier Design

Chip-Hong Chang, Yajuan He, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

A New Approach to the Design of Efficient Residue Generators for Arbitrary Moduli

Chip-Hong Chang, Jeremy Yung Shern Low, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture

Chip-Hong Chang, Jingling Xue, Thambipillai Srikanthan, 2005 .

Exploiting Process Variations and Programming Sensitivity of Phase Change Memory for Reconfigurable Physical Unclonable Functions

Chip-Hong Chang, Guido Torelli, Le Zhang, 2014, IEEE Transactions on Information Forensics and Security.

A signed integer programmable power-of-two scaler for {2n-1, 2n, 2n+1} RNS

Chip-Hong Chang, Thian Fatt Tay, Jeremy Yung Shern Low, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A low complexity modulo 2n+1 squarer design

Chip-Hong Chang, Ching-Chuen Jong, Ramya Muralidharan, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

A New Fast and Area-Efficient Adder-Based Sign Detector for RNS { $2^{n}-1, 2^{n}, 2^{n}+1$ }

Chip-Hong Chang, Sachin Kumar, Chip-Hong Chang, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A PUF-Based Data-Device Hash for Tampered Image Detection and Source Camera Identification

Chip-Hong Chang, Yue Zheng, Yuan Cao, 2020, IEEE Transactions on Information Forensics and Security.

Ultra low voltage, low power 4-2 compressor for high speed multiplications

Chip-Hong Chang, Jiangmin Gu, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

20 Years of research on intellectual property protection

Chip-Hong Chang, Miodrag Potkonjak, Gang Qu, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Kernel Extraction for Watermarking Combinational Logic Networks

Chip-Hong Chang, Aijiao Cui, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

A Generalized Time–Frequency Subtraction Method for Robust Speech Enhancement Based on Wavelet Filter Banks Modeling of Human Auditory System

Chip-Hong Chang, Yu Shao, Chip-Hong Chang, 2007, IEEE Transactions on Systems, Man, and Cybernetics, Part B (Cybernetics).

Self-organizing topological tree

Chip-Hong Chang, Pengfei Xu, Chip-Hong Chang, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

FPGA implementation of a frequency adaptive learning SOFM for digital color still imaging

Chip-Hong Chang, Rui Xiao, Shibu Menon, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

New algorithm for signed integer comparison in four-moduli superset {2n, 2n −1, 2n +1, 2n+1−1}

Chip-Hong Chang, Thian Fatt Tay, Chip-Hong Chang, 2014, 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

Statistical analysis and design of 6T SRAM cell for physical unclonable function with dual application modes

Chip-Hong Chang, Le Zhang, Zhi-Hui Kong, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Fault-Tolerant Computing in Redundant Residue Number System

Chip-Hong Chang, Thian Fatt Tay, Chip-Hong Chang, 2017 .

Improved differential coefficients-based low power FIR filters. Part I. Fundamentals

Chip-Hong Chang, A. Prasad Vinod, Ankita Singla, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Low-power, lightweight and reliability-enhanced current starved inverter based RO PUFs

Chip-Hong Chang, Yuan Cao, Chao Qun Liu, 2016, 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

An efficient architecture for adaptive progressive thresholding

Chip-Hong Chang, Hui Tian, Thambipillai Srikanthan, 2002, Asia-Pacific Conference on Circuits and Systems.

Frequency sensitive self-organizing maps and its application in color quantization

Chip-Hong Chang, Pengfei Xu, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Spherical Harmonic Modeling of a 0.05 μm Base BJT: A Comparison with Monte Carlo and Asymptotic Analysis

Chip-Hong Chang, Neil Goldsman, Isaak D. Mayergoyz, 1998, VLSI Design.

Low Power FIR Filter Realization using Minimal Difference Coefficients: Part I - Complexity Analysis

Chip-Hong Chang, A. Prasad Vinod, Pramod Kumar Meher, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

Flexible optimization of fixed polarity Reed-Muller expansions for multiple output completely and incompletely specified Boolean functions

Chip-Hong Chang, Bogdan J. Falkowski, 1995, ASP-DAC '95.

A novel counter-based low complexity inner-product architecture for high speed inputs

Chip-Hong Chang, Ching-Chuen Jong, Manas Ranjan Meher, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

ASHES 2018- Workshop on Attacks and Solutions in Hardware Security

Chip-Hong Chang, Ulrich Rührmair, Jorge Guajardo, 2018, CCS.

Accelerating residue-to-binary conversion of very high cardinality moduli set for fully homomorphic encryption

Chip-Hong Chang, Truong Phu Truan Ho, Chip-Hong Chang, 2016, Asia Pacific Conference on Circuits and Systems.

A novel covalent redundant binary Booth encoder

Chip-Hong Chang, Hossam A. H. Fahmy, Yajuan He, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Thermal simulator of 3D-IC with modeling of anisotropic TSV conductance and microchannel entrance effects

Chip-Hong Chang, Wei Zhang, Hao Yu, 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

Optimizating Emerging Nonvolatile Memories for Dual-Mode Applications: Data Storage and Key Generator

Chip-Hong Chang, Kaushik Roy, Xuanyao Fong, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Self Organizing Feature Map for Color Quantization on FPGA

Chip-Hong Chang, Rui Xiao, Menon Shibu, 2006 .

Fuzzy-ART based adaptive digital watermarking scheme

Chip-Hong Chang, Zhi Ye, Mingyan Zhang, 2005 .

Algorithm and architecture for a high density, low power scalar product macrocell

Chip-Hong Chang, Jiangmin Gu, Kiat Seng Yeo, 2004 .

A new event-driven Dynamic Vision Sensor based Physical Unclonable Function for camera authentication in reactive monitoring system

Chip-Hong Chang, Yue Zheng, Yuan Cao, 2016, 2016 IEEE Asian Hardware-Oriented Security and Trust (AsianHOST).

A Low Error and High Performance Multiplexer-Based Truncated Multiplier

Chip-Hong Chang, Ravi Kumar Satzoda, Chip-Hong Chang, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Residue Number Systems: A New Paradigm to Datapath Optimization for Low-Power and High-Performance Digital Signal Processing Applications

Chip-Hong Chang, Amir Sabbagh Molahosseini, Azadeh Alsadat Emrani Zarandi, 2015, IEEE Circuits and Systems Magazine.

Fixed and variable multi-modulus squarer architectures for triple moduli base of RNS

Chip-Hong Chang, Ramya Muralidharan, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A Low-Power Hybrid RO PUF With Improved Thermal Stability for Lightweight Applications

Chip-Hong Chang, Shoushun Chen, Le Zhang, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Self organizing topological tree for skin color detection

Chip-Hong Chang, Pengfei Xu, Xiaoyun Deng, 2004, The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings..

A Residue-to-Binary Converter for a New Five-Moduli Set

Chip-Hong Chang, Bin Cao, Thambipillai Srikanthan, 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

Real-time thermal management of 3D multi-core system with fine-grained cooling control

Chip-Hong Chang, Hao Yu, Xiwei Huang, 2010, 2010 IEEE International 3D Systems Integration Conference (3DIC).

A Kalman filter based on wavelet filter-bank and psychoacoustic modeling for speech enhancement

Chip-Hong Chang, Yu Shao, 2006, 2006 IEEE International Symposium on Circuits and Systems.

An Efficient Algorithm for the Calculation of Generalized Adding and Arithmetic Transforms From Disjoint Cubes of Boolean Functions

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1999, VLSI Design.

Synthesis-for-Testability Watermarking for Field Authentication of VLSI Intellectual Property

Chip-Hong Chang, Aijiao Cui, 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

Feasibility study of emerging non-volatilememory based physical unclonable functions

Chip-Hong Chang, Xuanyao Fong, Kaushik Roy, 2014, 2014 IEEE 6th International Memory Workshop (IMW).

An efficient channel clustering and flow rate allocation algorithm for non-uniform microfluidic cooling of 3D integrated circuits

Chip-Hong Chang, Hao Yu, Hanhua Qian, 2013, Integr..

Leakage-resilient memory-based physical unclonable function using phase change material

Chip-Hong Chang, Guido Torelli, Zhi-Hui Kong, 2014, 2014 International Carnahan Conference on Security Technology (ICCST).

Cluster-based distributed active current timer for hardware Trojan detection

Chip-Hong Chang, Shoushun Chen, Yuan Cao, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A configurable dual moduli multi-operand modulo adder

Chip-Hong Chang, Bin Cao, Thambipillai Srikanthan, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Secure Licensing of IP Cores on SRAM-Based FPGAs

Chip-Hong Chang, Li Zhang, 2016 .

A novel low power low voltage full adder cell

Chip-Hong Chang, Mingyan Zhang, Jiangmin Gu, 2003, 3rd International Symposium on Image and Signal Processing and Analysis, 2003. ISPA 2003. Proceedings of the.

A fast and compact circuit for integer square root computation based on Mitchell logarithmic method

Chip-Hong Chang, Ching-Chuen Jong, Joshua Yung Lih Low, 2012, 2012 IEEE International Symposium on Circuits and Systems.

A generalized perceptual time-frequency subtraction method for speech enhancement

Chip-Hong Chang, Yu Shao, 2006, 2006 IEEE International Symposium on Circuits and Systems.

DW-AES: A Domain-Wall Nanowire-Based AES for High Throughput and Energy-Efficient Data Encryption in Non-Volatile Memory

Chip-Hong Chang, Hao Yu, Yuhao Wang, 2016, IEEE Transactions on Information Forensics and Security.

Double-Base Number System and Its Application in FIR Filter Design

Chip-Hong Chang, Jiajia Chen, 2017 .

A hybrid watermarking scheme for sequential functions

Chip-Hong Chang, Li Zhang, Aijiao Cui, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Secure System Design and Trustable Computing

Chip-Hong Chang, Miodrag Potkonjak, Chip-Hong Chang, 2015 .

An Ultra Low-power Current-mode Sense Amplifier for Sram Applications

Chip-Hong Chang, Zhi-Hui Kong, Kiat Seng Yeo, 2005, J. Circuits Syst. Comput..

New Algorithm for Signed Integer Comparison in $\{2^{n+k},2^{n}-1,2^{n}+1,2^{n\pm 1}-1\}$ and Its Efficient Hardware Implementation

Chip-Hong Chang, Sachin Kumar, Thian Fatt Tay, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

Bit-parallel Multiple Constant Multiplication using Look-Up Tables on FPGA

Mathias Faust, Chip-Hong Chang, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

High-speed and low-power serial accumulator for serial/parallel multiplier

Chip-Hong Chang, Ching-Chuen Jong, Manas Ranjan Meher, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

Two Sides of the Same Coin: Boons and Banes of Machine Learning in Hardware Security

Chip-Hong Chang, Naghmeh Karimi, Wenye Liu, 2021, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Secure Mutual Authentication and Key-Exchange Protocol between PUF-Embedded IoT Endpoints

Chip-Hong Chang, Yue Zheng, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools

Chip-Hong Chang, Wei Hu, Anirban Sengupta, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Fingerprinting Deep Neural Networks - a DeepFool Approach

Chip-Hong Chang, Si Wang, Chip-Hong Chang, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

Live Demonstration: Event-Driven Physical Unclonable Function for Proactive Monitoring System by Dynamic Vision Sensor

Chip-Hong Chang, Yue Zheng, Jian Xian Soo, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

A Forward Error Compensation Approach for Fault Resilient Deep Neural Network Accelerator Design

Chip-Hong Chang, Wenye Liu, Chip-Hong Chang, 2021, ASHES@CCS.

Hardware Security in Emerging Technologies: Vulnerabilities, Attacks, and Solutions

Chip-Hong Chang, Naghmeh Karimi, Kanad Basu, 2021, IEEE J. Emerg. Sel. Topics Circuits Syst..

The ASHES 2019 special issue at JCEN

Chip-Hong Chang, Ulrich Rührmair, Patrick Schaumont, 2021, J. Cryptogr. Eng..

Stealthy and Robust Glitch Injection Attack on Deep Learning Accelerator for Target With Variational Viewpoint

Chip-Hong Chang, Fan Zhang, Wenye Liu, 2021, IEEE Transactions on Information Forensics and Security.

A large-scale comprehensive evaluation of single-slice ring oscillator and PicoPUF bit cells on 28-nm Xilinx FPGAs

Chip-Hong Chang, Máire O'Neill, Weiqiang Liu, 2021, J. Cryptogr. Eng..

A New Lightweight In Situ Adversarial Sample Detector for Edge Deep Neural Network

Chip-Hong Chang, Wenye Liu, Si Wang, 2021, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

PUF-based Mutual Authentication and Key-Exchange Protocol For Peer-to-Peer IoT Applications

Chip-Hong Chang, Chongyan Gu, Wenye Liu, 2021 .

A New Energy-Efficient and High Throughput Two-Phase Multi-Bit per Cycle Ring Oscillator-Based True Random Number Generator

Chip-Hong Chang, Xiaojin Zhao, Yuan Cao, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

Identification of FSM State Registers by Analytics of Scan-Dump Data

Chip-Hong Chang, Aijiao Cui, Chengkang He, 2021, IEEE Transactions on Information Forensics and Security.

Operations on Boolean functions and variables in spectral domain of arithmetic transform

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

Simple, Fast, and Exact RNS Scaler for the Three-Moduli Set

Chip-Hong Chang, Chip-Hong Chang, 2011 .

New Adaptive Color Quantization Method Based on

Chip-Hong Chang, Pengfei Xu, Thambipillai Srikanthan, 2005 .

A review of 0.18-μm full adder performances for tree structured arithmetic circuits

Chip-Hong Chang, Chip-Hong Chang, Jiangmin Gu, 2005, IEEE Trans. Very Large Scale Integr. Syst..

A hybrid CSA tree for merged arithmetic architecture of FIR filter

Chip-Hong Chang, Zhi Ye, 2003, 3rd International Symposium on Image and Signal Processing and Analysis, 2003. ISPA 2003. Proceedings of the.

A Low-power Reliability Enhanced Arbiter Physical Unclonable Function Based on Current Starved Multiplexers

Chip-Hong Chang, Yuan Cao, Si Wang, 2018, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Mutual conversions between generalised arithmetic expansions and free binary decision diagrams

Chip-Hong Chang, B. J. Falkowski, Chip-Hong Chang, 1998 .

Generation of quasi-optimal FBDDs through paired Haar spectra

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

Haar spectra-based entropy approach to quasi-minimisation of FBDDs

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1999 .

Reconfigurable multiple constant multiplication using minimum adder depth

Mathias Faust, Chip-Hong Chang, Oscar Gustafsson, 2010, 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers.

Efficient symbolic computation of generalised spectra

Chip-Hong Chang, Bogdan J. Falkowski, 1997 .

Calculation of arithmetic spectra from free binary decision diagrams

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.

Modified reduced adder graph algorithm for multiplierless FIR filters

Chip-Hong Chang, Fei Xu, Ching-Chuen Jong, 2005 .

Fast generalized arithmetic and adding transforms

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1995, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair.

An exact minimizer of fixed polarity Reed-Muller expansions

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1995 .

A novel paired Haar based transform: algorithms and interpretations in Boolean domain

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1993, Proceedings of 36th Midwest Symposium on Circuits and Systems.

Properties and applications of paired Haar transform

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1997, Proceedings of ICICS, 1997 International Conference on Information, Communications and Signal Processing. Theme: Trends in Information Systems Engineering and Wireless Multimedia Communications (Cat..

An Efficient Reverse Converter for the 4-Moduli Set , , , Based on the New

Chip-Hong Chang, Thambipillai Srikanthan, Bin Cao, 2003 .

Properties and methods of calculating generalised arithmetic and adding transforms

Chip-Hong Chang, B. J. Falkowski, Chip-Hong Chang, 1997 .

Paired Haar spectra computation through operations on disjoint cubes

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1999 .

Calculation of paired Haar spectra for systems of incompletely specified Boolean functions

Chip-Hong Chang, Bogdan J. Falkowski, Chip-Hong Chang, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

Area-saving technique for low-error redundant binary fixed-width multiplier implementation

Chip-Hong Chang, Tso-Bing Juang, Chi-Chung Wei, 2009, Proceedings of the 2009 12th International Symposium on Integrated Circuits.

Adaptive exact optimisation of minimally testable FPRM expansions

Chip-Hong Chang, Bogdan J. Falkowski, 1998 .

Flexible optimization of fixed polarity Reed-Muller expansions for multiple output completely and incompletely specified Boolean functions

Chip-Hong Chang, B.J. Falkowski, 1995, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair.

Logical manipulations and design of tributary networks in the arithmetic spectral domain

Chip-Hong Chang, B. J. Falkowski, 1998 .