L. Zhang

Response surface models for efficient, modular estimation of solder joint reliability in area array packages

L. Zhang, G. Subbarayan, B. C. Hunter, 2005, Microelectron. Reliab..

Constrained collapse solder joint formation for wafer-level-chip-scale packages to achieve reliability improvement

L. Nguyen, H. Nguyen, L. Zhang, 2004, 2004 Proceedings. 54th Electronic Components and Technology Conference (IEEE Cat. No.04CH37546).

Solder joint reliability model vath modified Darveaux's equations for the micro smd wafer level-chip scale package family

N. Kelkar, V. Patwardhan, L. Nguyen, 2003, 53rd Electronic Components and Technology Conference, 2003. Proceedings..

A parametric solder joint reliability model for wafer level-chip scale package

Bahgat Sammakia, Satish C. Chaparala, James M. Pitarresi, 2002, 52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345).

Thermal characterization of stacked-die packages

L. Zhang, A. Poddar, V. Gumaste, 2004, Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545).