Berkin Akin

发表

ZCOMP: Reducing DNN Cross-Layer Memory Footprint Using Vector Extensions

Alaa R. Alameldeen, Zeshan A. Chishti, Berkin Akin, 2019, MICRO.

Accelerator-aware Neural Network Design using AutoML pdf

Suyog Gupta, Berkin Akin, Suyog Gupta, 2020, ArXiv.

HAMLeT Architecture for Parallel Data Reorganization in Memory

Franz Franchetti, James C. Hoe, Berkin Akin, 2016, IEEE Micro.

FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation

Franz Franchetti, James C. Hoe, Berkin Akin, 2014, 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

Algorithm and architecture optimization for large size two dimensional discrete fourier transform (abstract only)

Franz Franchetti, James C. Hoe, Peter A. Milder, 2012, FPGA '12.

Apollo: Transferable Architecture Exploration

Amir Yazdanbakhsh, Kevin Swersky, Milad Hashemi, 2021, ArXiv.

A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing

Franz Franchetti, James C. Hoe, Lawrence T. Pileggi, 2013, 2013 IEEE International 3D Systems Integration Conference (3DIC).

Memory system characterization of deep learning workloads

Zeshan Chishti, Zeshan A. Chishti, Berkin Akin, 2019, MEMSYS.

A Case For Asymmetric Processing in Memory

Alaa R. Alameldeen, Berkin Akin, Berkin Akin, 2019, IEEE Computer Architecture Letters.

A case for hardware-supported sub-cache line accesses

Markus Dreseler, Christopher Schmidt, Berkin Akin, 2018, DaMoN.

Data reorganization in memory using 3D-stacked DRAM

Franz Franchetti, James C. Hoe, Berkin Akin, 2015, 2015 ACM/IEEE 42nd Annual International Symposium on Computer Architecture (ISCA).

HAMLeT: Hardware accelerated memory layout transform within 3D-stacked DRAM

Franz Franchetti, James C. Hoe, Berkin Akin, 2014, 2014 IEEE High Performance Extreme Computing Conference (HPEC).

Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes

Franz Franchetti, James C. Hoe, Peter A. Milder, 2012, 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines.

Discovering Multi-Hardware Mobile Models via Architecture Search pdf

Okan Arikan, Hanxiao Liu, Weijun Wang, 2020, ArXiv.

Enabling portable energy efficiency with memory accelerated library

Tze Meng Low, Franz Franchetti, James C. Hoe, 2015, 2015 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

FFTS with near-optimal memory access through block data layouts

Franz Franchetti, Berkin Akin, James C. Hoe, 2014, ICASSP.

Dynamic fine-grained sparse memory accesses

Christopher J. Hughes, Rajat Agarwal, Jongsoo Park, 2018, MEMSYS.

Algorithm/hardware co-optimized SAR image reconstruction with 3D-stacked logic in memory

Doru-Thom Popovici, Franz Franchetti, James C. Hoe, 2014, 2014 IEEE High Performance Extreme Computing Conference (HPEC).

MobileDets: Searching for Object Detection Architectures for Mobile Accelerators pdf

Bo Chen, Hanxiao Liu, Vikas Singh, 2020, 2021 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR).

An Evaluation of Edge TPU Accelerators for Convolutional Neural Networks pdf

James Laudon, Amir Yazdanbakhsh, Berkin Akin, 2021, ArXiv.

Mitigating Edge Machine Learning Inference Bottlenecks: An Empirical Study on Accelerating Google Edge Models pdf

Onur Mutlu, Saugata Ghose, Amirali Boroumand, 2021, ArXiv.

Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks

Onur Mutlu, Saugata Ghose, Amirali Boroumand, 2021, 2021 30th International Conference on Parallel Architectures and Compilation Techniques (PACT).

Discovering Multi-Hardware Mobile Models via Architecture Search

Okan Arikan, Hanxiao Liu, Andrew G. Howard, 2020, 2021 IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops (CVPRW).

Rethinking Co-design of Neural Architectures and Hardware Accelerators pdf

Mingxing Tan, James Laudon, Yanqi Zhou, 2021, ArXiv.

Understanding the design space of DRAM-optimized hardware FFT accelerators

Franz Franchetti, James C. Hoe, Berkin Akin, 2014, 2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors.