Jyh-Chyurn Guo

发表

Low voltage and low power UWB CMOS LNA using current-reused and forward body biasing techniques

Jyh-Chyurn Guo, Ching-Shiang Lin, Yu-Tang Liang, 2017, 2017 IEEE MTT-S International Microwave Symposium (IMS).

Jyh-Chyurn Guo, 盧笙豐, Sheng-Feng Lu, 2006 .

A Broadband and Scalable Lossy Substrate Model for RF Noise Simulation and Analysis in Nanoscale MOSFETs With Various Pad Structures

Jyh-Chyurn Guo, Yi-Hsiu Tsai, 2009 .

Bit-serial Systolic Array Implementation Of Euclid's Algorithm For Inversion And Division In GF(2/supm)

Chin-Liang Wang, Jyh-Chyurn Guo, 1997, Proceedings of Technical Papers. International Symposium on VLSI Technology, Systems, and Applications.

Analytical modeling of proximity and skin effects for millimeter-wave inductors simulation and design in nano Si CMOS

Jyh-Chyurn Guo, Ren-Jia Chan, 2014, 2014 IEEE MTT-S International Microwave Symposium (IMS2014).

Low-K/Cu CMOS-based SoC technology with 115-GHz f/sub T/, 100-GHz f/sub max/, low noise 80-nm RF CMOS, high-Q MiM capacitor, and spiral Cu inductor

Jyh-Chyurn Guo, 2006, IEEE Transactions on Semiconductor Manufacturing.

A Broadband and Scalable Lumped Element Model for Fully Symmetric Inductors Under Single-Ended and Differentially Driven Operations

Jyh-Chyurn Guo, Teng-Yang Tan, Jyh-Chyurn Guo, 2007, IEEE Transactions on Electron Devices.

5.5 GHz Low Voltage and High Linearity RF CMOS Mixer Design

Jyh-Chyurn Guo, Senhg-Feng Lu, 2008, 2008 European Microwave Integrated Circuit Conference.

A New Three-Dimensional Capacitor Model for Accurate Simulation of Parasitic Capacitances in Nanoscale MOSFETs

Jyh-Chyurn Guo, Chih-Ting Yeh, 2009, IEEE Transactions on Electron Devices.

Low-power and high-linearity mixer design using complex transconductance equivalent circuit

Chien-Nan Kuo, Jyh-Chyurn Guo, Wei-Chia Zhan, 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

The impact of layout dependent effects on mobility and flicker noise in nanoscale multifinger nMOSFETs for RF and analog design

Jyh-Chyurn Guo, Yi-Zen Lo, Jyun-Rong Ou, 2016, 2016 IEEE MTT-S International Microwave Symposium (IMS).

Halo and LDD Engineering for Multiple ${\rm V}_{\rm TH}$ High Performance Analog CMOS Devices

Jyh-Chyurn Guo, 2007, IEEE Transactions on Semiconductor Manufacturing.

A simple analytical model to accurately predict self-resonance frequencies of on-silicon-chip inductors in TEM mode and eddy current mode

Jyh-Chyurn Guo, Teng-Yang Tan, 2008 .

The impact of layout dependent stress and gate resistance on high frequency performance and noise in multifinger and donut MOSFETs

Jyh-Chyurn Guo, Chih-You Ku, Kuo-Ling Yeh, 2013, 2013 IEEE MTT-S International Microwave Symposium Digest (MTT).

A New Symmetric Inductor Model for RF Circuits under Single-end and Differential Operations

Jyh-Chyurn Guo, Teng-Yang Tan, 2007 .

Layout-dependent effects on high frequency performance and noise of sub-40nm multi-finger n-channel and p-channel MOSFETs

Jyh-Chyurn Guo, Kuo-Liang Yeh, Chih-Shiang Chang, 2012, 2012 IEEE/MTT-S International Microwave Symposium Digest.

Layout-Dependent Stress Effect on High-Frequency Characteristics and Flicker Noise in Multifinger and Donut MOSFETs

Jyh-Chyurn Guo, Kuo-Liang Yeh, 2011, IEEE Transactions on Electron Devices.

A New Lossy Substrate Model for Accurate RF CMOS Noise Extraction and Simulation With Frequency and Bias Dependence

Jyh-Chyurn Guo, Yi-Min Lin, 2006, IEEE Transactions on Microwave Theory and Techniques.

A New Method for Layout-Dependent Parasitic Capacitance Analysis and Effective Mobility Extraction in Nanoscale Multifinger MOSFETs

Jyh-Chyurn Guo, Kuo-Liang Yeh, Jyh-Chyurn Guo, 2011, IEEE Transactions on Electron Devices.

A Broadband and Scalable On-Chip Inductor Model Appropriate for Operation Modes of Varying Substrate Resistivities

Jyh-Chyurn Guo, Teng-Yang Tan, 2007, IEEE Transactions on Electron Devices.

Pocket implantation effect on drain current flicker noise in analog nMOSFET devices

Jyh-Chyurn Guo, Chih-Sheng Chang, Chih-Chang Cheng, 2004 .

A new lossy substrate de-embedding method for sub-100 nm RF CMOS noise extraction and modeling

Jyh-Chyurn Guo, Yi-Min Lin, 2006 .

A quasi-two-dimensional analytical model for the turn-on characteristics of polysilicon thin-film transistors

Jyh-Chyurn Guo, Pole-Shang Lin, Ching-Yuan Wu, 1990 .

Narrow-Width Effect on High-Frequency Performance and RF Noise of Sub-40-nm Multifinger nMOSFETs and pMOSFETs

Jyh-Chyurn Guo, Kuo-Liang Yeh, Jyh-Chyurn Guo, 2013, IEEE Transactions on Electron Devices.

A new approach to determine the effective channel length and the drain-and-source series resistance of miniaturized MOSFET's

Steve S. Chung, Jyh-Chyurn Guo, C.C.-H. Hsu, 1994 .

Ultra-low voltage and low power UWB CMOS LNA using forward body biases

Jyh-Chyurn Guo, Chih-Shiang Chang, 2013, 2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).