Caroline Collange

发表

Fernando Magno Quintão Pereira, Sylvain Collange, Vinícius Fernandes dos Santos, 2018, CGO.

Monte Carlo Logarithmic Number System for Model Predictive Control

Mayuresh V. Kothare, Sylvain Collange, Mark G. Arnold, 2007, 2007 International Conference on Field Programmable Logic and Applications.

Spill Code Placement for SIMD Machines

Fernando Magno Quintão Pereira, Sylvain Collange, Diogo Sampaio, 2012, SBLP.

A Scalable Design for Signal Conditioning and Digitization in Implantable Multi-Channel Neural Sensors

Sylvain Collange, Mark G. Arnold, Panagiotis D. Vouzis, 2007 .

LNS Subtraction Using Novel Cotransformation and/or Interpolation

Sylvain Collange, Mark G. Arnold, Panagiotis D. Vouzis, 2007, 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP).

39 Divergence Analysis

Fernando Magno Quintão Pereira, Diogo Sampaio, Rafael Martins de Souza, 2015 .

Divergence analysis

Fernando Magno Quintão Pereira, Sylvain Collange, Rafael Martins de Souza, 2013, ACM Trans. Program. Lang. Syst..

Interval Arithmetic in CUDA

David Defour, Sylvain Collange, Marc Daumas, 2011 .

Dynamic Inter-Thread Vectorization Architecture: Extracting DLP from TLP

Sylvain Collange, André Seznec, Bharath Narasimha Swamy, 2016, 2016 28th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD).

A Novel Cotransformation for LNS Subtraction

Sylvain Collange, Mark G. Arnold, Panagiotis D. Vouzis, 2010, J. Signal Process. Syst..

Divergence Analysis with Affine Constraints

Fernando Magno Quintão Pereira, Sylvain Collange, Rafael Martins de Souza, 2012, 2012 IEEE 24th International Symposium on Computer Architecture and High Performance Computing.

Line-by-line spectroscopic simulations on graphics processing units

David Defour, Sylvain Collange, Marc Daumas, 2008, Comput. Phys. Commun..

Function Call Re-Vectorization

Fernando Magno Quintão Pereira, Sylvain Collange, Rubens E. A. Moreira, 2017, PPoPP.

Dynamic Detection of Uniform and Affine Vectors in GPGPU Computations

Yao Zhang, David Defour, Sylvain Collange, 2009, Euro-Par Workshops.

Barra: A Parallel Functional Simulator for GPGPU

David Defour, David Parello, Sylvain Collange, 2010, 2010 IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems.

Simty: generalized SIMT execution on RISC-V

Sylvain Collange, Caroline Collange, 2017 .

Thread scheduling and memory coalescing for dynamic vectorization of SPMD workloads

Fernando Magno Quintão Pereira, Wagner Meira, Sylvain Collange, 2014, Parallel Comput..

Data and Instruction Uniformity in Minimal Multi-threading

Fernando Magno Quintão Pereira, Wagner Meira, Sylvain Collange, 2012, 2012 IEEE 24th International Symposium on Computer Architecture and High Performance Computing.

Simty : generalized SIMT execution on RISC-V Sylvain Collange Inria sylvain

Sylvain Collange, Caroline Collange, 2017 .

Full-Speed Deterministic Bit-Accurate Parallel Floating-Point Summation on Multi- and Many-Core Architectures

David Defour, Sylvain Collange, Stef Graillat, 2014 .

Affine Vector Cache for memory bandwidth savings

Sylvain Collange, Alexandre Kouyoumdjian, Alexandre Kouyoumdjian, 2011 .

Identifying scalar behavior in CUDA kernels

Sylvain Collange, Caroline Collange, 2011 .

Options for Denormal Representation in Logarithmic Arithmetic

Sylvain Collange, Mark G. Arnold, M. Arnold, 2014, Journal of Signal Processing Systems.

A Real/Complex Logarithmic Number System ALU

Sylvain Collange, Mark G. Arnold, M. Arnold, 2011, IEEE Transactions on Computers.

Reproducible floating-point atomic addition in data-parallel environment

David Defour, Sylvain Collange, D. Defour, 2015, 2015 Federated Conference on Computer Science and Information Systems (FedCSIS).