D. C. Keezer

A WSI rapid prototyping architecture

Vijay K. Jain, Hiroomi Hikawa, D. C. Keezer, 1992, [1992] Proceedings International Conference on Wafer Scale Integration.

Multi-Gigahertz Test Signal Synthesis with "Timing-on-the-Fly"

Sungyeol Kim, Seongkwan Lee, Hosun Yoo, 2012, 2012 IEEE 18th International Mixed-Signal, Sensors, and Systems Test Workshop.

Bare die testing and MCM probing techniques

D. C. Keezer, 1992, Proceedings 1992 IEEE Multi-Chip Module Conference MCMC-92.

Defect tolerance and yield for a WSI rapid prototyping architecture

Vijay K. Jain, Hiroomi Hikawa, D. C. Keezer, 1991, [Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems.

Extension of digital test system data rates to the gigabit per second range

D. C. Keezer, R. J. Wenzel, 1993, 1993 IEEE Instrumentation and Measurement Technology Conference.

Modules for gigahertz digital testing of ECL

D. C. Keezer, 1993, Proceedings ETC 93 Third European Test Conference.

A parallel test method for MCM substrate interconnection networks

Kimberly Newman, J. S. Davis, D. C. Keezer, 1998 .