Ahmed Hemani

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Distributed DVFS using rationally-related frequencies and discrete voltage levels

Jean-Michel Chabloz, Ahmed Hemani, A. Hemani, 2010, 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED).

The Pyramid Model : A General Framework for Study of Modelling, Analysis and Synthesis concepts of Electronic Systems

Axel Jantsch, Ahmed Hemani, Shashi Kumar, 1997 .

Spiking brain models: Computation, memory and communication constraints for custom hardware implementation

Anders Lansner, Ahmed Hemani, Nasim Farahini, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

Security Evaluation of Products: Bridging the Gap between Common Criteria (CC) and Real Option Thinking

Ahmed Hemani, Haider Abbas, Louise Yngström, 2008, WCE 2008.

Gaussian Random Number Generation

Ahmed Hemani, Jamshaid Sarwar Malik, A. Hemani, 2016, ACM Comput. Surv..

Physical design aware system level synthesis of hardware

Ahmed Hemani, Shuo Li, Nasim Farahini, 2015, 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS).

Revisiting Central Limit Theorem: Accurate Gaussian Random Number Generation in VLSI

Ahmed Hemani, Jamshaid Sarwar Malik, Jameel Nawaz Malik, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Unifying CORDIC and Box-Muller algorithms: An accurate and efficient Gaussian Random Number generator

Ahmed Hemani, Jamshaid Sarwar Malik, Nasirud Din Gohar, 2013, 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors.

The Dark Side of Silicon

Axel Jantsch, Hannu Tenhunen, Pasi Liljeberg, 2017 .

System level virtual prototyping of DSP ASICs using grammar based approach

Johnny Öberg, Ahmed Hemani, Abhijit K. Deb, 1999, Proceedings Tenth IEEE International Workshop on Rapid System Prototyping. Shortening the Path from Specification to Prototype (Cat. No.PR00246).

Test strategies on functionally partitioned module-based programmable architecture for base-band processing

Ahmed Hemani, Adam Postula, Simon Leung, 2001, Proceedings Euromicro Symposium on Digital Systems Design.

A novel allocation strategy for control and memory intensive telecommunication circuits

Axel Jantsch, Hannu Tenhunen, Johnny Öberg, 1996, Proceedings of 9th International Conference on VLSI Design.

Partially reconfigurable interconnection network for dynamically reprogrammable resource array

Ahmed Hemani, Muhammad Ali Shami, 2009, 2009 IEEE 8th International Conference on ASIC.

An improved self-reconfigurable interconnection scheme for a Coarse Grain Reconfigurable Architecture

Ahmed Hemani, Muhammad Ali Shami, 2010, NORCHIP 2010.

Internal Representation for Specification and Design of Heterogenous Systems

Axel Jantsch, Anshul Kumar, Peeter Ellervee, 1997 .

Predicting energy and performance overhead of Real-Time Operating Systems

Ingo Sander, Ahmed Hemani, Sandro Penolazzi, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

A Library Development Framework for a Coarse Grain Reconfigurable Architecture

Ahmed Hemani, Muhammad Ali Shami, Omer Malik, 2011, 2011 24th Internatioal Conference on VLSI Design.

High Level Synthesis for Field Programmable Gate Arrays

Ahmed Hemani, Adam Postula, 1993 .

Design of D-AMPS Channel Decoder with Codesign Methodologies

Axel Jantsch, Kalle Tammemäe, Ahmed Hemani, 1996 .

Customizable Compression Architecture for Efficient Configuration in CGRAs

Hannu Tenhunen, Masoud Daneshtalab, Juha Plosila, 2014, FCCM 2014.

Lowering the latency of interfaces for rationally-related frequencies

Jean-Michel Chabloz, Ahmed Hemani, 2010, 2010 IEEE International Conference on Computer Design.

Optimal Selection of Function Implementation in a Hierarchical Configware Synthesis Method for a Coarse Grain Reconfigurable Architecture

Fahimeh Jafari, Ahmed Hemani, Shuo Li, 2011, 2011 14th Euromicro Conference on Digital System Design.

NACU: A Non-Linear Arithmetic Unit for Neural Networks

Maurizio Martina, Ahmed Hemani, Guido Baccelli, 2020, 2020 57th ACM/IEEE Design Automation Conference (DAC).

Refresh Triggered Computation: Improving the Energy Efficiency of Convolutional Neural Network Accelerators pdf

Onur Mutlu, Ahmed Hemani, Hasan Hassan, 2019, ArXiv.

DyMeP: An Infrastructure to Support Dynamic Memory Binding for Runtime Mapping in CGRAs

Hannu Tenhunen, Juha Plosila, Peeter Ellervee, 2015, 2015 28th International Conference on VLSI Design.

Grammar-based design of embedded systems

Axel Jantsch, Adam Postula, Johnny Öberg, 2001, J. Syst. Archit..

Morphable Compression Architecture for Efficient Configuration in CGRAs

Hannu Tenhunen, Masoud Daneshtalab, Juha Plosila, 2014, 2014 17th Euromicro Conference on Digital System Design.

Memory allocation and optimization in system-level architectural synthesis

Ahmed Hemani, Shuo Li, 2013, 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

Optimizing BCPNN Learning Rule for Memory Access

Yu Yang, Ahmed Hemani, Anders Lansner, 2020, Frontiers in Neuroscience.

Scheduling of outputs in grammar-based hardware synthesis of data communication protocols

Johnny Öberg, Anshul Kumar, Ahmed Hemani, 1998, Proceedings Design, Automation and Test in Europe.

Validation of Interface Protocols Using Grammar-based Models

Axel Jantsch, Ahmed Hemani, Johnny Oeberg, 1998 .

Energy-Aware Fault-Tolerant Network-on-Chips for Addressing Multiple Traffic Classes

Hannu Tenhunen, Juha Plosila, Ahmed Hemani, 2012, 2012 15th Euromicro Conference on Digital System Design.

Classification of Massively Parallel Computer Architectures

Ahmed Hemani, Muhammad Ali Shami, 2012, 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum.

Interactive Hardware-Software Partitioning and Memory Allocation Based on Data Transfer Profiling

Axel Jantsch, Hannu Tenhunen, Ahmed Hemani, 1995 .

NoC Based Distributed Partitionable Memory System for a Coarse Grain Reconfigurable Architecture

Ahmed Hemani, Muhammad Ali Shami, Muhammad Adeel Tajammul, 2011, 2011 24th Internatioal Conference on VLSI Design.

Modelling and Synthesis of Operational and Management System (OAM) of ATM Switch Fabrics

Axel Jantsch, Hannu Tenhunen, Johnny Öberg, 1995 .

Accurate and Efficient Three Level Design Space Exploration Based on Constraints Satisfaction Optimization Problem Solver

Ahmed Hemani, Shuo Li, 2014, FCCM 2014.

Global Interconnect and Control Synthesis in System Level Architectural Synthesis Framework

Ahmed Hemani, Shuo Li, 2013, 2013 Euromicro Conference on Digital System Design.

Implementation and evaluation of configuration scrubbing on CGRAs: A case study

Hannu Tenhunen, Juha Plosila, Stanislaw J. Piestrak, 2013, 2013 International Symposium on System on Chip (SoC).

Hardware/software partitioning and minimizing memory interface traffic

Axel Jantsch, Hannu Tenhunen, Johnny Öberg, 1994, EURO-DAC '94.

Development of programmable architecture for base-band processing

Ahmed Hemani, Adam Postula, Simon Leung, 2000, Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future.

Restructuring VLSI Education at Royal Inst. Of Technology

Hannu Tenhunen, Ahmed Hemani, Lars Hellberg, 1993 .

System oriented VLSI curriculum at KTH

Axel Jantsch, Hannu Tenhunen, Jouni Isoaho, 1997, Proceedings of International Conference on Microelectronic Systems Education.

Self-organisation and its application to binding

Ahmed Hemani, 1993, The Sixth International Conference on VLSI Design.

Low-Latency and Low-Overhead Mesochronous and Plesiochronous Synchronizers

Jean-Michel Chabloz, Ahmed Hemani, 2011, 2011 14th Euromicro Conference on Digital System Design.

Automatic Test Program Generation Framework for NoC-Based MPSoC Compiler Validation

Ahmed Hemani, Shuo Li, Omer Malik, 2011 .

Scheduling by Self-organization

Ahmed Hemani, Adam Postula, A. Hemani, 1990 .

Energy-aware coarse-grained reconfigurable architectures using dynamically reconfigurable isolation cells

Hannu Tenhunen, Juha Plosila, Ahmed Hemani, 2013, International Symposium on Quality Electronic Design (ISQED).

A route-through FPGA architecture for improved inter-chip connectivity

Hannu Tenhunen, Ahmed Hemani, Adam Postula, 2000 .

Exploiting data transfer locality in memory mapping

Francky Catthoor, Peeter Ellervee, Ahmed Hemani, 1999, Proceedings 25th EUROMICRO Conference. Informatics: Theory and Practice for the New Millennium.

Generating high tail accuracy Gaussian Random Numbers in hardware using central limit theorem

Ahmed Hemani, Jamshaid Sarwar Malik, Jameel Nawaz Malik, 2011, 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip.

Optimization of Controller in HLS over the controller and datapath boundary

Ahmed Hemani, Adam Postula, 1993 .

Application of high-level synthesis in an industrial project

Ahmed Hemani, Björn Fjellborg, Börje Karlsson, 1994, Proceedings of 7th International Conference on VLSI Design.

Accurate and Efficient Three Level Design Space Exploration Based on Constraints Satisfaction Optimization Problem Solver

Ahmed Hemani, Shuo Li, 2014, 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines.

Reconfigurable Architecture for Base-band Data Processing

Ahmed Hemani, Adam Postula, Simon Leung, 2000, PDPTA.

Internal Representation and behavioralsynthesis of control dominated applications

Anshul Kumar, Peeter Ellervee, Ahmed Hemani, 1996 .

Specifying Local Timing Constraints in VHDL for HLS of Digital Systems

Petru Eles, Johnny Öberg, Zebo Peng, 1995 .

ROA Based Agile Security Evaluation of IT Products for Developing Countries

Haider Abbas, Ahmed Hemani, Louise Yngström, 2009 .

Elastic Management and QoS Provisioning Scheme for Adaptable Multi-core Protocol Processing Architecture

Zhonghai Lu, Ahmed Hemani, Mohammad Badawi, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

Improving performance of fading channel simulators by use of uniformly distributed random numbers

Ahmed Hemani, Jamshaid Sarwar Malik, Ben Slimane, 2010, The 10th IEEE International Symposium on Signal Processing and Information Technology.

Polymorphic Configuration Architecture for CGRAs

Hannu Tenhunen, Juha Plosila, Peeter Ellervee, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Special issue on many-core embedded systems

Masoud Daneshtalab, Juha Plosila, Ahmed Hemani, 2014, Microprocess. Microsystems.

Atomic stream computation unit based on micro-thread level parallelism

Ahmed Hemani, Nasim Farahini, 2015, 2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Address generation scheme for a coarse grain reconfigurable architecture

Ahmed Hemani, Muhammad Ali Shami, 2011, ASAP 2011 - 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors.

The virtual prototyping of an AM chip using grammar based approach

Ahmed Hemani, Ladimer S. Nagurney, Adam Postula, 1999 .

Integration of Physical and Functional Electronic System Representations in Electronic Curriculum

Axel Jantsch, Hannu Tenhunen, Ahmed Hemani, 1997 .

A Methodology and Algorithms for Efficient Synthesis from System Description in SDL

Ahmed Hemani, Bengt Svantesson, Shashi Kumar, 1997 .

Trade-offs in High-level Synthesis of Telecommunication Circuits

Axel Jantsch, Hannu Tenhunen, Johnny Öberg, 1995 .

Low-Latency Maximal-Throughput Communication Interfaces for Rationally Related Clock Domains

Jean-Michel Chabloz, Ahmed Hemani, A. Hemani, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A pragma based approach for mapping MATLAB applications on a coarse grained reconfigurable architecture

Ahmed Hemani, Omer Malik, 2012, 2012 25th Symposium on Integrated Circuits and Systems Design (SBCCI).

Modelling of Operation and Maintance Functions in the ATM Network

Axel Jantsch, Ahmed Hemani, Bengt Svantesson, 1995 .

Energy-aware-task-parallelism for efficient dynamic voltage, and frequency scaling, in CGRAs

Hannu Tenhunen, Juha Plosila, Ahmed Hemani, 2013, 2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS).

RuRot: Run-time rotatable-expandable partitions for efficient mapping in CGRAs

Hannu Tenhunen, Masoud Daneshtalab, Juha Plosila, 2014, 2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV).

MTP-Caffe: Memory, Timing, and Power aware tool for mapping CNNs to GPUs

Ahmed Hemani, Y. Yang, Syed M. A. H. Jafri, 2017, PARMA-DITAM '17.

Self organising maps in computer aided design of electronic circuits

Ahmed Hemani, Adam Postula, 1999 .

RiBoSOM: rapid bacterial genome identification using self-organizing map implemented on the synchoros SiLago platform

Prashant Sharma, Ahmed Hemani, Yu Yang, 2018, SAMOS.

Customizable Compression Architecture for Efficient Configuration in CGRAs

Hannu Tenhunen, Masoud Daneshtalab, Juha Plosila, 2014, 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines.

A flexible communication scheme for rationally-related clock frequencies

Jean-Michel Chabloz, Ahmed Hemani, A. Hemani, 2009, 2009 IEEE International Conference on Computer Design.

Cell placement by self-organisation

Ahmed Hemani, Adam Postula, 1990, Neural Networks.

A Structured Approach for Internalizing Externalities Caused by IT Security Mechanisms

Louise Yngström, Ahmed Hemani, Haider Abbas, 2010, 2010 Second International Workshop on Education Technology and Computer Science.

Layered Spiral Algorithm for memory-aware mapping and scheduling on Network-on-Chip

Fahimeh Jafari, Ahmed Hemani, Shashi Kumar, 2010, NORCHIP 2010.

Network on Chip : An architecture for billion transistor era

Axel Jantsch, Johnny Öberg, Mikael Millberg, 2000 .

The SiLago Method: Next Generation VLSI Architectures and Design Methods

Ahmed Hemani, 2016, MES@ISCA.

A General Approach to High-Level Energy and Performance Estimation in SoCs

Ahmed Hemani, Sandro Penolazzi, Luca Bolognino, 2009, 2009 22nd International Conference on VLSI Design.

Predicting bus contention effects on energy and performance in multi-processor SoCs

Ingo Sander, Ahmed Hemani, Sandro Penolazzi, 2011, 2011 Design, Automation & Test in Europe.

eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex

Norbert Wehn, Ahmed Hemani, Yu Yang, 2019, Journal of Signal Processing Systems.

Energy-Aware Fault-Tolerant CGRAs Addressing Application with Different Reliability Needs

Hannu Tenhunen, Juha Plosila, Stanislaw J. Piestrak, 2013, 2013 Euromicro Conference on Digital System Design.

Enhanced Synthesis Strategies to cope with Exception Handling in ProGram

Johnny Öberg, Ahmed Hemani, Anshul Kumar, 1998 .

Compression Based Efficient and Agile Configuration Mechanism for Coarse Grained Reconfigurable Architectures

Hannu Tenhunen, Juha Plosila, Ahmed Hemani, 2011, 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum.

Adaptability infrastructure for bridging IT security evaluation and options theory

Haider Abbas, Ahmed Hemani, Louise Yngström, 2009, SIN '09.

Power-aware dynamic memory management on many-core platforms utilizing DVFS

Iraklis Anagnostopoulos, Dimitrios Soudris, Alexandros Bartzas, 2013, TECS.

Self-organizing Binder

Ahmed Hemani, 1992 .

Control Scheme for a CGRA

Ahmed Hemani, Muhammad Ali Shami, 2010, 2010 22nd International Symposium on Computer Architecture and High Performance Computing.

Customization methodology of a Coarse Grained Reconfigurable architecture

Ahmed Hemani, Nasim Farahini, Siavoosh Payandeh Azad, 2014, 2014 NORCHIP.

A rule-based approach for improving allocation of filter structures in HLS

Axel Jantsch, Johnny Öberg, Jouni Isoaho, 1996, Proceedings of 9th International Conference on VLSI Design.

MOCHA: Morphable Locality and Compression Aware Architecture for Convolutional Neural Networks

Ahmed Hemani, Kolin Paul, Naeem Abbas, 2017, 2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS).

Flexible Codesign Target Architecture for Early Prototyping of CMIST Systems

Kalle Tammemäe, Ahmed Hemani, Mattias O'Nils, 1996, FPL.

SPEED: Open-Source Framework to Accelerate Speech Recognition on Embedded GPUs

Ahmed Hemani, Syed M. A. H. Jafri, Leonardo Intesa, 2017, 2017 Euromicro Conference on Digital System Design (DSD).

NISCHE: Neural net inspired scheduling algorithm

Ahmed Hemani, Adam Postula, 1989 .

Evaluating benefits of Globally Asynchronous Locally Synchronous VLSI Architecture

Hannu Tenhunen, Adam Postula, Ahmed Hemani, 1998 .

High performance 3D-FFT implementation

Anshul Kumar, Ahmed Hemani, Kolin Paul, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

Security characterization for evaluation of software architectures using ATAM

Ahmed Hemani, Haider Abbas, Asad Raza, 2009, 2009 International Conference on Information and Communication Technologies.

TransPar: Transformation based dynamic Parallelism for low power CGRAs

Hannu Tenhunen, Masoud Daneshtalab, Juha Plosila, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Distributed Runtime Computation of Constraints for Multiple Inner Loops

Ahmed Hemani, Kolin Paul, Nasim Farahini, 2013, 2013 Euromicro Conference on Digital System Design.

Segmented Bus Based Path Setup Scheme for a Distributed Memory Architecture

Ahmed Hemani, Muhammad Ali Shami, Muhammad Adeel Tajammul, 2012, 2012 IEEE 6th International Symposium on Embedded Multicore SoCs.

Synchoricity and NOCs could make billion gate custom hardware centric SOCs affordable

Ahmed Hemani, Syed M. A. H. Jafri, Shayesteh Masoumian, 2017, 2017 Eleventh IEEE/ACM International Symposium on Networks-on-Chip (NOCS).

Hardware Synthesis of an ATM Multiplexer Modelled in SDL : A Case Study

Axel Jantsch, Ahmed Hemani, Shashi Kumar, 1999 .

A Heterogeneous Modeling Environment of DSP Systems Using Grammar Based Approach

Johnny Öberg, Ahmed Hemani, A. K. Deb, 2000 .

High Level Synthesis Framework for a Coarse Grain Reconfigurable Architecture

Ahmed Hemani, Muhammad Ali Shami, Omer Malik, 2010, NORCHIP 2010.

Design of evaluation platform of Machine vision for portable wireless terminals

Jia Liu, Zheying Li, Ahmed Hemani, 2011, 2011 4th International Congress on Image and Signal Processing.

Hardware synthesis of an ATM multiplexer from SDL to VHDL: a case study

Axel Jantsch, Ahmed Hemani, Bengt Svantesson, 1999, Proceedings. IEEE Computer Society Workshop on VLSI '99. System Design: Towards System-on-a-Chip Paradigm.

A software oriented approach to hardware-software co-design

Axel Jantsch, Peeter Ellervee, Ahmed Hemani, 1994 .

Morphable DPU: Smart and efficient data path for signal processing applications

Ahmed Hemani, Muhammad Ali Shami, 2009, 2009 IEEE Workshop on Signal Processing Systems.

TRENDS IN SOC ARCHITECTURES

Ahmed Hemani, Peter Klapproth, A. Hemani, 2006 .

Customizable coarse-grained energy-efficient reconfigurable packet processing architecture

Zhonghai Lu, Ahmed Hemani, Mohammad Badawi, 2014, 2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors.

A General Approach to High-Level Energy and Performance Estimation in System-on-Chip Architectures

Ahmed Hemani, Sandro Penolazzi, Luca Bolognino, 2009, J. Low Power Electron..

TransMap: Transformation Based Remapping and Parallelism for High Utilization and Energy Efficiency in CGRAs

Masoud Daneshtalab, Ahmed Hemani, Naeem Abbas, 2016, IEEE Transactions on Computers.

A 1 GIPS Peak Performance Multi-Threaded Processor Core Using Interleaved Processing And A Revolving register File Targeted for GaAs

Axel Jantsch, Johnny Öberg, Peeter Ellervee, 1995 .

System-level data format exploration for dynamically allocated data structures

Francky Catthoor, Peeter Ellervee, Ahmed Hemani, 2000, Proceedings 37th Design Automation Conference.

Analyzing IT Security Evaluation needs for Developing Countries

Ahmed Hemani, Haider Abbas, Louise Yngström, 2009 .

A Reconfigurable Processor for Phylogenetic Inference

Pei Liu, Ahmed Hemani, Kolin Paul, 2011, 2011 24th Internatioal Conference on VLSI Design.

A Step Beyond TLM : Inferring Architectural Transactions at Functional Untimed Level

Ahmed Hemani, Sandro Penolazzi, Mohammad Badawi, 2008 .

A Coarse-Grained Reconfigurable Processor for Sequencing and Phylogenetic Algorithms in Bioinformatics

Pei Liu, Ahmed Hemani, Kolin Paul, 2011, 2011 International Conference on Reconfigurable Computing and FPGAs.

Architecture and Implementation of Dynamic Parallelism, Voltage and Frequency Scaling (PVFS) on CGRAs

Hannu Tenhunen, Juha Plosila, Ahmed Hemani, 2015, ACM J. Emerg. Technol. Comput. Syst..

A Case Study on Hardwardsoftware Partitioning

Axel Jantsch, Johnny Öberg, Peeter Ellervee, 1994 .

A Generic Scheme for Communication Representation and Mapping

Axel Jantsch, Hannu Tenhunen, Peeter Ellervee, 1999 .

Security Evaluation of ESAM Architecture using ATAM

Ahmed Hemani, Haider Abbas, Louise Yngström, 2008 .

NeuroCGRA: A CGRA with support for neural networks

Hannu Tenhunen, Masoud Daneshtalab, Juha Plosila, 2014, 2014 International Conference on High Performance Computing & Simulation (HPCS).

TEA: Timing and Energy Aware compression architecture for Efficient Configuration in CGRAs

Masoud Daneshtalab, Juha Plosila, Ahmed Hemani, 2015, Microprocess. Microsystems.

Option Based Evaluation: Security Evaluation of IT Products Based on Options Theory

Haider Abbas, Ahmed Hemani, Louise Yngström, 2009, 2009 First IEEE Eastern European Conference on the Engineering of Computer Based Systems.

Private reliability environments for efficient fault-tolerance in CGRAs

Hannu Tenhunen, Juha Plosila, Stanislaw J. Piestrak, 2014, Des. Autom. Embed. Syst..

TransMem: A memory architecture to support dynamic remapping and parallelism in low power high performance CGRAs

Peeter Ellervee, Ahmed Hemani, Syed M. A. H. Jafri, 2016, 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

SiLago : A Structured Layout Scheme to Enable Efficient High Level and System Level Synthesis

Ahmed Hemani, Nasim Farahini, Hassan Sohofi, 2016 .

Effort, resources, and abstraction vs performance in high-level synthesis: finding new answers to an old question

Ahmed Hemani, Jamshaid Sarwar Malik, Paolo Palazzari, 2012, CARN.

Modelling Embedded Systems at Functional Untimed Application Level

Ahmed Hemani, Sandro Penolazzi, Mohammad Badawi, 2007 .

BABBAGE - A Rule basedtool for synthesis of hardware systems

Axel Jantsch, Ahmed Hemani, Johnny Öberg, 1994 .

Customised reconfigurable block-based architecture for baseband data processing in telecommunication applications

Ahmed Hemani, Adam Postula, K. C. Leung, 2000 .

On the design of Doppler filters for next generation radio channel simulators

Ahmed Hemani, Jamshaid Sarwar Malik, 2009, 2009 3rd International Conference on Signals, Circuits and Systems (SCS).

39.9 GOPs/watt multi-mode CGRA accelerator for a multi-standard basestation

Ahmed Hemani, Shuo Li, Nasim Farahini, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A comparison of six languages for system level description of telecom applications

Axel Jantsch, Ahmed Hemani, Mattias O'Nils, 2001 .

Proceedings of the First International Workshop on Many-core Embedded Systems

Masoud Daneshtalab, Ahmed Hemani, Maurizio Palesi, 2013 .

A many-core hardware acceleration platform for short read mapping problem using distributed memory interface with 3D-stacked architecture

Pei Liu, Ahmed Hemani, Kolin Paul, 2014, 2014 International Symposium on System-on-Chip (SoC).

The Rugby Model: a conceptual frame for the study of modelling, analysis and synthesis concepts of electronic systems

Axel Jantsch, Ahmed Hemani, Shashi Kumar, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

Lowering power consumption in clock by using globally asynchronous locally synchronous design style

Johnny Öberg, Thomas Olsson, Peeter Ellervee, 1999, DAC '99.

Global Control and Storage Synthesis for a System Level Synthesis Approach

Ahmed Hemani, Shuo Li, Nasim Farahini, 2013, 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines.

VLSI System Education at KTH ESDlab

Hannu Tenhunen, Ahmed Hemani, M. Mokhtari, 1994 .

Design of operation and maintenance part of the atm protocol

Hannu Tenhunen, Ahmed Hemani, Adam Postula, 1995 .

Energy and Performance Model of a SPARC Leon3 Processor

Ahmed Hemani, Sandro Penolazzi, Luca Bolognino, 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

A Coarse Grain Reconfigurable Architecture for sequence alignment problems in bio-informatics

Pei Liu, Ahmed Hemani, 2010, 2010 IEEE 8th Symposium on Application Specific Processors (SASP).

Approximate Computing Applied to Bacterial Genome Identification using Self-Organizing Maps

Yu Yang, Ahmed Hemani, Kolin Paul, 2019, 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

AKKA : A Codesign Environment

Axel Jantsch, Kalle Tammemäe, Ahmed Hemani, 1995 .

A neural net based self organising scheduling algorithm

Ahmed Hemani, Adam Postula, 1990, Proceedings of the European Design Automation Conference, 1990., EDAC..

Controller Synthesis in LOGSYN

Ahmed Hemani, Adam Postula, Mats Fredriksson, 1990 .

Implementation-Independent Macrolibrary for Telecommunication in VHDL

Hannu Tenhunen, Ahmed Hemani, Mozammel H. Khan, 1996 .

Grammar-based Modelling of Clock Protocols for Low Power Implementations: A Case Study

Johnny Öberg, Peeter Ellervee, Ahmed Hemani, 1998 .

Comparing Conventional HLS with Grammar-Based Hardware Synthesis: A Case Study

Johnny Öberg, Anshul Kumar, Peeter Ellervee, 1997 .

A divide and conquer approach for system level verification of DSP ASICs

Ahmed Hemani, Adam Postula, Abhijit Kumar Deb, 1999 .

SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level

Ahmed Hemani, Nasim Farahini, Syed M. A. H. Jafri, 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

IRSYD : An Internal Representation for Heterogeneous Embedded Systems

Axel Jantsch, Peeter Ellervee, Ahmed Hemani, 1998 .

Can a reconfigurable architecture beat ASIC as a CNN accelerator?

Ahmed Hemani, Syed M. A. H. Jafri, Dimitrios Stathis, 2017, 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS).

Hardware/Software Cosynthesis for Reconfigurable Systems

Axel Jantsch, Kalle Tammemäe, Ahmed Hemani, 1996 .

Service-Guaranteed Multi-port Packet Memory for Parallel Protocol Processing Architecture

Zhonghai Lu, Ahmed Hemani, Mohammad Badawi, 2016, 2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP).

Controller Synthesis in Control and Memory Centric High-level Synthesis System

Hannu Tenhunen, Johnny Öberg, Anshul Kumar, 1996 .

Neural Network Based Estimator to Explore the Design Space at System Level

Axel Jantsch, Peeter Ellervee, Ahmed Hemani, 1994 .

Improved Bioinformatics Processing Unit for Multiple Applications

Pei Liu, Ahmed Hemani, Kolin Paul, 2012, 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum.

A conceptual custom super-computer design for real-time simulation of human brain

Ahmed Hemani, Nasim Farahini, A. Hemani, 2013, 2013 21st Iranian Conference on Electrical Engineering (ICEE).

3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems

Norbert Wehn, Pei Liu, Ahmed Hemani, 2017, International Journal of Parallel Programming.

Charting the EDA roadmap

Ahmed Hemani, A. Hemani, 2004 .

Private configuration environments (PCE) for efficient reconfiguration, in CGRAs

Hannu Tenhunen, Juha Plosila, Ahmed Hemani, 2013, 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors.

A FPGA-based Hardware Accelerator for Bayesian Confidence Propagation Neural Network

Xiaoming Hu, Anders Lansner, Ahmed Hemani, 2020, 2020 IEEE Nordic Circuits and Systems Conference (NorCAS).

Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach

Axel Jantsch, Iraklis Anagnostopoulos, Philippe Martin, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Impact of Interpolation Techniques on Statistical Properties and Speed of Fading Channel Simulators

Ahmed Hemani, Jamshaid Sarwar Malik, N.D. Gohar, 2010, 2010 6th International Conference on Wireless and Mobile Communications.

A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D–Stacked Architecture

Norbert Wehn, Pei Liu, Ahmed Hemani, 2016, J. Signal Process. Syst..

A structure of modern VLSI curriculum

Hannu Tenhunen, Ahmed Hemani, J. Isoaho, 1994, Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit.

Architectural Description of an Automated System for Uncertainty Issues Management in Information Security

Ahmed Hemani, Haider Abbas, Louise Yngström, 2010 .

Specifying Local Timing Constraints for HLS of Digital Systems in VHDL

Petru Eles, Krzysztof Kuchcinski, Johnny Öberg, 1996 .

An Efficient Scheme for Hardware Implementation of Processes with Multiple Active Instances

Ahmed Hemani, Bengt Svantesson, Shashi Kumar, 1997 .

Configurable FFT Processor Using Dynamically Reconfigurable Resource Arrays

Ahmed Hemani, Muhammad Ali Shami, Muhammad Adeel Tajammul, 2019, J. Signal Process. Syst..

Grammar-based hardware synthesis of data communication protocols

Johnny Öberg, Anshul Kumar, Ahmed Hemani, 1996, Proceedings of 9th International Symposium on Systems Synthesis.

Experiences using Akka: A Hardware-Software Codesign Tool Kit in design of Telecommunication systems

Axel Jantsch, Hannu Tenhunen, Kalle Tammemäe, 1995 .

Power Management Architecture in McNoC

Jean-Michel Chabloz, Ahmed Hemani, 2012 .

A scalable custom simulation machine for the Bayesian Confidence Propagation Neural Network model of the brain

Fabien Clermidy, Anders Lansner, Ahmed Hemani, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

The MOSART Mapping Optimization for Multi-Core ARchiTectures

Axel Jantsch, Iraklis Anagnostopoulos, Philippe Martin, 2010, ISVLSI.

Three-Dimensional Design Space Exploration for System Level Synthesis

Ahmed Hemani, Shuo Li, 2014, 2014 17th Euromicro Conference on Digital System Design.

Quality-of-service-aware adaptation scheme for multi-core protocol processing architecture

Zhonghai Lu, Ahmed Hemani, Mohammad Badawi, 2017, Microprocess. Microsystems.

Specification of exception handling in grammar-based hardware synthesis

Johnny Öberg, Anshul Kumar, Ahmed Hemani, 1998, Proceedings. 24th EUROMICRO Conference (Cat. No.98EX204).

Synchronizing distributed state machines in a coarse grain reconfigurable architecture

Ahmed Hemani, Omer Malik, 2011, 2011 International Symposium on System on Chip (SoC).

An efficient hardware implementation of high quality AWGN generator using Box-Muller method

Ahmed Hemani, Jamshaid Sarwar Malik, Jameel Nawaz Malik, 2011, 2011 11th International Symposium on Communications & Information Technologies (ISCIT).

A Metamodel for Studying Concepts in Electronic System Design

Axel Jantsch, Ahmed Hemani, Shashi Kumar, 2000, IEEE Des. Test Comput..

Case Study: Constraint Programming in a System Level Synthesis Framework

Ahmed Hemani, Shuo Li, 2014, CP.

Low-Latency No-Handshake GALS Interfaces for Fast-Receiver Links

Jean-Michel Chabloz, Ahmed Hemani, A. Hemani, 2012, 2012 25th International Conference on VLSI Design.

Area Estimation in the High Level Synthesis Using Neural Networks

Axel Jantsch, Johnny Öberg, Peeter Ellervee, 1994 .

Specification and Synthesis of Exception Handling in Grammar-based Hardware Synthesis

Ahmed Hemani, Shashi Kumar, Johnny Oerg, 1998 .

A digitally controlled on-chip clock multiplier for globally asynchronous locally synchronous systems

Ahmed Hemani, Thomas Meincke, T. Olsson, 1999, 42nd Midwest Symposium on Circuits and Systems (Cat. No.99CH36356).

Grammar-based hardware synthesis from port-size independent specifications

Johnny Öberg, Anshul Kumar, Ahmed Hemani, 2000, IEEE Trans. Very Large Scale Integr. Syst..

Comparison of Six Languages for System Level Descriptions of Telecom Systems

Axel Jantsch, Johnny Öberg, Peeter Ellervee, 1998 .

Regional Clock Tree Generation by Abutment in Synchoros VLSI Design pdf

Ahmed Hemani, Panagiotis Chaourani, Syed M. A. H. Jafri, 2019, ArXiv.

Novel Estimation Technique for High-level Synthesis Systems

Ahmed Hemani, 1993 .

Addressing Dynamic Issues in Information Security Management

Haider Abbas, Ahmed Hemani, Louise Yngström, 2011, Inf. Manag. Comput. Secur..

A methodology and algorithms for efficient interprocess communication synthesis from system description in SDL

Ahmed Hemani, Shashi Kumar, Bengt Svantesson, 1998, Proceedings Eleventh International Conference on VLSI Design.

Is there a Niche for a General Protocol Processor

Axel Jantsch, Johnny Öberg, Ahmed Hemani, 1998 .

System Level Virtual Prototyping of DSP SOCs Using Grammar Based Approach

Johnny Öberg, Ahmed Hemani, Adam Postula, 2000, Des. Autom. Embed. Syst..

Interconnect centred design methodology for system-on-a-chip integration

Ahmed Hemani, Adam Postula, H. Tenhunnen, 1999 .

A code generation method for system-level synthesis on ASIC, FPGA and manycore CGRA

Ahmed Hemani, Shuo Li, Jamshaid Sarwar Malik, 2013, MES '13.

Specifying Local Timing Constraints for HLS Purpose

Petru Eles, Johnny Öberg, Zebo Peng, 1994 .

IRSYD - An Internal Representation for System Description. Version 0.1

Axel Jantsch, Ingo Sander, Peeter Ellervee, 1997 .

Self-organization based scheduling and binding algorithm for High-level Synthesis of digital circuits

Ahmed Hemani, Adam Postula, S. Hungenahally, 1993 .

Globally asynchronous locally synchronous architecture for large high-performance ASICs

Hannu Tenhunen, Johnny Öberg, Thomas Olsson, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Exploring Spiking Neural Network on Coarse-Grain Reconfigurable Architectures

Hannu Tenhunen, Masoud Daneshtalab, Juha Plosila, 2014, MES '14.

A GALS Network-on-Chip based on rationally-related frequencies

Jean-Michel Chabloz, Ahmed Hemani, 2011, 2011 IEEE 29th International Conference on Computer Design (ICCD).

Hardware software codesign of DSP system using grammar based approach

Adam Postula, Ahmed Hemani, Johnny Öberg, 2001, VLSI Design 2001. Fourteenth International Conference on VLSI Design.

2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), Darmstadt, Germany, July 10-12, 2013

Leandro Soares Indrusiak, Kartikeya Bhardwaj, Pravin S. Mane, 2013, Reconfigurable Communication-centric Systems-on-Chip.

Guest Editorial: Special Issue on Architectures and Design Methods for Neural Networks

Ahmed Hemani, Kolin Paul, Mohammed Shafique, 2020, J. Signal Process. Syst..

Dynamic memory management methodology applied to embedded telecom network systems

Chantal Ykman-Couvreur, Ahmed Hemani, Diederik Verkest, 2002, IEEE Trans. Very Large Scale Integr. Syst..

Evaluation of Languages for Specification of Complex Telecom Systems

Axel Jantsch, Ingo Sander, Ahmed Hemani, 1998 .

A code reuse method for many-core coarse-grained reconfigurable architecture function library development

Ahmed Hemani, Shuo Li, Guo Chen, 2011, 2011 International Symposium on Integrated Circuits.

Segment-Based Scheduling of Control Dominated Applications in High Level Synthesis

Anshul Kumar, Peeter Ellervee, Ahmed Hemani, 1996 .

Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation

Axel Jantsch, Hannu Tenhunen, Ahmed Hemani, 2012, PECCS.

Comparison of four heuristic algorithms forunified allocation and binding in high-level synthesis

Peeter Ellervee, Ahmed Hemani, Shashi Kumar, 1997 .

Energy-Aware CGRAs using Dynamically Re-configurable isolation Cells

Hannu Tenhunen, Juha Plosila, Ahmed Hemani, 2013, ISQED 2013.

FIST: A Framework to Interleave Spiking Neural Networks on CGRAs

Hannu Tenhunen, Masoud Daneshtalab, Juha Plosila, 2015, 2015 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing.

A coarse-grained reconfigurable protocol processor

Ahmed Hemani, Mohammad Badawi, 2011, 2011 International Symposium on System on Chip (SoC).

System level synthesis of hardware for DSP applications using pre-characterized function implementations

Ingo Sander, Ahmed Hemani, Shuo Li, 2013, 2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

Parallel distributed scalable runtime address generation scheme for a coarse grain reconfigurable computation and storage fabric

Ahmed Hemani, Kolin Paul, Nasim Farahini, 2014, Microprocess. Microsystems.

Interactive Design Space Exploration

Ahmed Hemani, 1993 .

Compact generic intermediate representation (CGIR) to enable late binding in coarse grained reconfigurable architectures

Hannu Tenhunen, Juha Plosila, Ahmed Hemani, 2011, 2011 International Conference on Field-Programmable Technology.

Empowering Security Evaluation of IT Products with Options Theory

Haider Abbas, Ahmed Hemani, Louise Yngström, 2009 .

Grammar based Design and Verification of an LPC Speech Codec: A Case Study

Johnny Öberg, Ahmed Hemani, Abhijit Kumar Deb, 2000 .

The Rugby Model : A Framework for the Study of Modelling, Analysis, and Synthesis Concepts in Electronic Systems

Axel Jantsch, Ahmed Hemani, Shashi Kumar, 1999 .

System-level data-format exploration for dynamically allocated datastructures

Francky Catthoor, Peeter Ellervee, Ahmed Hemani, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Inferring energy and performance cost of RTOS in priority-driven scheduling

Ingo Sander, Ahmed Hemani, Sandro Penolazzi, 2010, International Symposium on Industrial Embedded System (SIES).

AlgoSil : A High Level Synthesis Tool targeting Micro-architecture Level Physical Design Platform

Ahmed Hemani, Nasim Farahini, Hassan Sohofi, 2016 .

A network on chip architecture and design methodology

Axel Jantsch, Martti Forsell, Johnny Öberg, 2002, Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002.

3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems

Pei Liu, Ahmed Hemani, Kolin Paul, 2015, 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS).

AKKA: a tool-kit for cosynthesis and prototyping

Axel Jantsch, Kalle Tammemäe, Ahmed Hemani, 1996 .

Energy-Aware Fault-Tolerant Network-on-Chips for Addressing Multiple Traffic Classes

Hannu Tenhunen, Juha Plosila, Ahmed Hemani, 2012, DSD.

Approximate computation of post-synaptic spikes reduces bandwidth to synaptic storage in a model of cortex

Anders Lansner, Ahmed Hemani, Dimitrios Stathis, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Scheduling Persistent and Fully Cooperative Instructions

Ahmed Hemani, Kolin Paul, Yu Yang, 2021, 2021 24th Euromicro Conference on Digital System Design (DSD).

MOHAQ: Multi-Objective Hardware-Aware Quantization of recurrent neural networks

Eren Erdal Aksoy, Ahmed Hemani, Nesma M. Rezk, 2021, J. Syst. Archit..

Scheduling Persistent and Fully Cooperative Instructions

Ahmed Hemani, Kolin Paul, Yu Yang, 2021, 2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

Refresh Triggered Computation

Onur Mutlu, Ahmed Hemani, Hasan Hassan, 2020, ACM Trans. Archit. Code Optim..

PCSS: Privacy Preserving Communication Scheme for SDN Enabled Smart Homes

Haider Abbas, Ahmed Hemani, Waseem Iqbal, 2022, IEEE Sensors Journal.

Synthesis of Predictable Global NoC by Abutment in Synchoros VLSI Design

Ahmed Hemani, Dimitrios Stathis, Jordi Altay'o Gonz'alez, 2021, 2021 15th IEEE/ACM International Symposium on Networks-on-Chip (NOCS).

Multi-objective Recurrent Neural Networks Optimization for the Edge - a Quantization-based Approach pdf

Eren Erdal Aksoy, Tomas Nordström, Ahmed Hemani, 2021, ArXiv.

A Memristor Model with Concise Window Function for Spiking Brain-Inspired Computation

Anders Lansner, Ahmed Hemani, Zhuo Zou, 2021, 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS).

A Perspective on Dark Silicon

Axel Jantsch, Hannu Tenhunen, Pasi Liljeberg, 2017 .

Dynamically Reconfigurable Resource Array

Ahmed Hemani, 2008 .