Jacopo Franco

发表

Buried Silicon-Germanium pMOSFETs: Experimental Analysis in VLSI Logic Circuits Under Aggressive Voltage Scaling

Massimo Alioto, Liesbeth Witters, Guido Groeseneken, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices

Aaron Thean, Philippe Roussel, Guido Groeseneken, 2015, 2015 IEEE International Reliability Physics Symposium.

Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling

Massimo Alioto, Liesbeth Witters, Guido Groeseneken, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Defect-centric perspective of time-dependent BTI variability

Philippe Roussel, Tibor Grasser, Guido Groeseneken, 2012, Microelectron. Reliab..

Design and simulation of on-chip circuits for parallel characterization of ultrascaled transistors for BTI reliability

Guido Groeseneken, Jacopo Franco, Ben Kaczer, 2014, 2014 IEEE International Integrated Reliability Workshop Final Report (IIRW).

Charge based DC compact modeling of bulk FinFET transistor

Cor Claeys, Antonio Cerdeira, Jacopo Franco, 2013 .

Characterization and modeling of charge trapping: From single defects to devices

Tibor Grasser, Jacopo Franco, Ben Kaczer, 2014, 2014 IEEE International Conference on IC Design & Technology.

The defect-centric perspective of device and circuit reliability — From individual defects to circuits

Francky Catthoor, Dimitri Linten, Philippe Roussel, 2015, 2015 45th European Solid State Device Research Conference (ESSDERC).

Techniques and Devices

Guido Groeseneken, Jacopo Franco, Ben Kaczer, 2014 .

On the impact of mechanical stress on gate oxide trapping

M. Gonzalez, Dimitri Linten, Jacopo Franco, 2020, 2020 IEEE International Reliability Physics Symposium (IRPS).

Impact of Off State Stress on advanced high-K metal gate NMOSFETs

Jacopo Franco, Tom Schram, Marc Aoulaiche, 2014, 2014 44th European Solid State Device Research Conference (ESSDERC).

Relevance of fin dimensions and high-pressure anneals on hot-carrier degradation

Naoto Horiguchi, Dimitri Linten, Jacopo Franco, 2020, 2020 IEEE International Reliability Physics Symposium (IRPS).

Statistical simulations of 6T-SRAM cell ageing using a reliability aware simulation flow

Jie Ding, A. Asenov, Naoto Horiguchi, 2015, 2015 45th European Solid State Device Research Conference (ESSDERC).

Comphy - A compact-physics framework for unified modeling of BTI

A. Subirats, Dimitri Linten, Geert Hellings, 2018, Microelectron. Reliab..

Characterization and simulation methodology for time-dependent variability in advanced technologies

Diederik Verkest, Francky Catthoor, Dimitri Linten, 2015, 2015 IEEE Custom Integrated Circuits Conference (CICC).

Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling

W. Li, A. Vandooren, Liesbeth Witters, 2018, 2018 International Conference on IC Design & Technology (ICICDT).

A compact NBTI model for accurate analog integrated circuit reliability simulation

Guido Groeseneken, Jacopo Franco, Georges Gielen, 2011, 2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC).

Hot electron and hot hole induced degradation of SiGe p-FinFETs studied by degradation maps in the entire bias space

Dimitri Linten, Jacopo Franco, Ben Kaczer, 2018, 2018 IEEE International Reliability Physics Symposium (IRPS).

Accelerated Capture and Emission (ACE) Measurement Pattern for Efficient BTI Characterization and Modeling

Dimitri Linten, Tibor Grasser, Guido Groeseneken, 2019, 2019 IEEE International Reliability Physics Symposium (IRPS).

Self-heating-aware CMOS reliability characterization using degradation maps

Dimitri Linten, Jacopo Franco, Ben Kaczer, 2018, 2018 IEEE International Reliability Physics Symposium (IRPS).

A drift-diffusion-based analytic description of the energy distribution function for hot-carrier degradation in decananometer nMOSFETs

Prateek Sharma, Tibor Grasser, Jacopo Franco, 2016, 2016 46th European Solid-State Device Research Conference (ESSDERC).

Scaling of BTI reliability in presence of time-zero variability

Francky Catthoor, Guido Groeseneken, Jacopo Franco, 2014, 2014 IEEE International Reliability Physics Symposium.

Origins and implications of increased channel hot carrier variability in nFinFETs

Naoto Horiguchi, Aaron Thean, Philippe Roussel, 2015, 2015 IEEE International Reliability Physics Symposium.

Comparative experimental analysis of time-dependent variability using a transistor test array

Dimitri Linten, Guido Groeseneken, Jacopo Franco, 2016, 2016 IEEE International Reliability Physics Symposium (IRPS).

Understanding the Basic Advantages of Bulk FinFETs for Sub- and Near-Threshold Logic Circuits From Device Measurements

Massimo Alioto, Naoto Horiguchi, Guido Groeseneken, 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.

Characterization of time-dependent variability using 32k transistor arrays in an advanced HK/MG technology

Francky Catthoor, Philippe Roussel, Guido Groeseneken, 2015, 2015 IEEE International Reliability Physics Symposium.

BTI reliability of ultra-thin EOT MOSFETs for sub-threshold logic

Tibor Grasser, Guido Groeseneken, Felice Crupi, 2012, Microelectron. Reliab..

Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps

Dimitri Linten, Guido Groeseneken, Jacopo Franco, 2018, 2018 IEEE International Reliability Physics Symposium (IRPS).

Array-Based Statistical Characterization of CMOS Degradation Modes and Modeling of the Time-Dependent Variability Induced by Different Stress Patterns in the $\{\boldsymbol{V_{G}}, \boldsymbol{V_{D}}\}$ bias space

Dimitri Linten, Jacopo Franco, Ben Kaczer, 2019, 2019 IEEE International Reliability Physics Symposium (IRPS).

Experimental evidences and simulations of trap generation along a percolation path

A. Asenov, Naoto Horiguchi, Tibor Grasser, 2015, 2015 45th European Solid State Device Research Conference (ESSDERC).

Superior reliability and reduced Time-Dependent variability in high-mobility SiGe channel pMOSFETs for VLSI logic applications

Naoto Horiguchi, Geert Hellings, Liesbeth Witters, 2012, 2012 IEEE International Conference on IC Design & Technology.

The defect-centric perspective of device and circuit reliability—From gate oxide defects to circuits

Dimitri Linten, Philippe Roussel, Tibor Grasser, 2016 .

Reliability of SiGe channel MOS

Geert Hellings, Jerome Mitard, Liesbeth Witters, 2012 .

ESD characterization of planar InGaAs devices

X. Zhang, Dimitri Linten, Geert Hellings, 2015, 2015 IEEE International Reliability Physics Symposium.

Beyond-Si materials and devices for more Moore and more than Moore applications

A. Vandooren, Anabela Veloso, Liesbeth Witters, 2016, 2016 International Conference on IC Design and Technology (ICICDT).

Smart-array for pipelined BTI characterization

Diederik Verkest, Dimitri Linten, Guido Groeseneken, 2015, 2015 IEEE International Integrated Reliability Workshop (IIRW).

A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability

Francky Catthoor, Dimitri Linten, Philippe Roussel, 2018, Microelectron. Reliab..

Recent trends in the electrical characterization and reliability assessment of CMOS devices

Philippe Roussel, Guido Groeseneken, Jacopo Franco, 2012 .

Reliability aware simulation flow: From TCAD calibration to circuit level analysis

Asen Asenov, Naoto Horiguchi, Jacopo Franco, 2015, 2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).

Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices

Naoto Horiguchi, Dimitri Linten, Tibor Grasser, 2019, 2019 IEEE International Reliability Physics Symposium (IRPS).

NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures

Naoto Horiguchi, Aaron Thean, Philippe Roussel, 2015, 2015 IEEE International Reliability Physics Symposium.

The properties, effect and extraction of localized defect profiles from degraded FET characteristics

Guido Groeseneken, Jacopo Franco, Ben Kaczer, 2021, 2021 IEEE International Reliability Physics Symposium (IRPS).

Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies : Invited paper

A. Vandooren, Naoto Horiguchi, Dimitri Linten, 2021, 2021 International Conference on IC Design and Technology (ICICDT).

Physics-based device aging modelling framework for accurate circuit reliability assessment

Dimitri Linten, Philippe Roussel, Guido Groeseneken, 2021, 2021 IEEE International Reliability Physics Symposium (IRPS).

Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies

Dimitri Linten, Geert Hellings, Jacopo Franco, 2021, 2021 IEEE International Reliability Physics Symposium (IRPS).

A BSIM-Based Predictive Hot-Carrier Aging Compact Model

Dimitri Linten, Jacopo Franco, Ben Kaczer, 2021, 2021 IEEE International Reliability Physics Symposium (IRPS).

Complete degradation mapping of stacked gate-all-around Si nanowire transistors considering both intrinsic and extrinsic effects

Naoto Horiguchi, Dimitri Linten, Philippe Roussel, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

A predictive physical model for hot-carrier degradation in ultra-scaled MOSFETs

Tibor Grasser, Jacopo Franco, Ben Kaczer, 2014, 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).

Toward a streamlined projection of small Device BTI lifetime distributions

Philippe Roussel, Tibor Grasser, Guido Groeseneken, 2012 .

Physical modeling of hot-carrier degradation for short- and long-channel MOSFETs

Tibor Grasser, Jacopo Franco, Ben Kaczer, 2014, 2014 IEEE International Reliability Physics Symposium.

Array-Based Statistical Characterization of CMOS Degradation Modes and Modeling of the Time-Dependent Variability Induced by Different Stress Patterns in the {V G , V D } bias space.

Dimitri Linten, Jacopo Franco, Ben Kaczer, 2019 .

Short Note: Poly-Si heaters for ultra-fast local temperature control of on-wafer test structures

Guido Groeseneken, Jacopo Franco, B. Kaczer, 2014 .

Record performance InGaAs homo-junction TFET with superior SS reliability over MOSFET

Rita Rooyackers, Anne Vandooren, Aaron Thean, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Channel Hot Carriers in SiGe and Ge pMOSFETs

Jacopo Franco, Ben Kaczer, 2015 .

Predictive Hot-Carrier Modeling of n-Channel MOSFETs

Karl Rupp, Tibor Grasser, Jacopo Franco, 2014, IEEE Transactions on Electron Devices.

Improvement in NBTI reliability of Si-passivated Ge/high-k/metal-gate pFETs

Jerome Mitard, Anabela Veloso, Guido Groeseneken, 2009 .

Impact of the Substrate Orientation on CHC Reliability in n-FinFETs—Separation of the Various Contributions

Naoto Horiguchi, Guido Groeseneken, Felice Crupi, 2014, IEEE Transactions on Device and Materials Reliability.

NBTI-Generated Defects in Nanoscaled Devices: Fast Characterization Methodology and Modeling

Dimitri Linten, Guido Groeseneken, Jacopo Franco, 2017, IEEE Transactions on Electron Devices.

Positive bias temperature instability evaluation in fully recessed gate GaN MIS-FETs

Guido Groeseneken, Jacopo Franco, Denis Marcon, 2016, 2016 IEEE International Reliability Physics Symposium (IRPS).

Demonstration of sufficient BTI reliability for a 14-nm finFET 1.8 V I/O technology featuring a thick ALD SiO2 IL and Ge p-channel

Naoto Horiguchi, Dimitri Linten, Geert Hellings, 2017, 2017 IEEE International Reliability Physics Symposium (IRPS).

Impact of halo implant on the hot carrier reliability of germanium p-channel metal-oxide-semiconductor field-effect transitors

Jerome Mitard, Guido Groeseneken, Jacopo Franco, 2011 .

Correlation of interface states/border traps and threshold voltage shift on AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors

Guido Groeseneken, Jacopo Franco, Denis Marcon, 2015 .

High Hole Mobility in 65 nm Strained Ge p-Channel Field Effect Transistors with HfO2Gate Dielectric

Jerome Mitard, Jacopo Franco, Luigi Pantisano, 2011 .

Engineering the III-V Gate Stack Properties by Optimization of the ALD Process

Aaron Thean, Jacopo Franco, Stefan De Gendt, 2014 .

Implications of BTI-Induced Time-Dependent Statistics on Yield Estimation of Digital Circuits

Francky Catthoor, Guido Groeseneken, Jacopo Franco, 2014, IEEE Transactions on Electron Devices.

Statistical Distribution of Defect Parameters

Jacopo Franco, Ben Kaczer, Pieter Weckx, 2014 .

Ultimate nano-electronics

Jerome Mitard, Rita Rooyackers, Anne Vandooren, 2015 .

NBTI Reliability of SiGe and Ge Channel pMOSFETs With $ \hbox{SiO}_{2}/\hbox{HfO}_{2}$ Dielectric Stack

Jerome Mitard, Liesbeth Witters, Tibor Grasser, 2013, IEEE Transactions on Device and Materials Reliability.

Activation Energies for Oxide- and Interface-Trap Charge Generation Due to Negative-Bias Temperature Stress of Si-Capped SiGe-pMOSFETs

Dimitri Linten, Jerome Mitard, Liesbeth Witters, 2015, IEEE Transactions on Device and Materials Reliability.

Negative Bias Temperature Instability in (Si)Ge pMOSFETs

Guido Groeseneken, Jacopo Franco, Ben Kaczer, 2014 .

On the impact of the Si passivation layer thickness on the NBTI of nanoscaled Si0.45Ge0.55 pMOSFETs

Jerome Mitard, Liesbeth Witters, Tibor Grasser, 2011 .

Depth localization of positive charge trapped in silicon oxynitride field effect transistors after positive and negative gate bias temperature stress

Tibor Grasser, Guido Groeseneken, Jacopo Franco, 2011 .

Impact of wafer thinning on front-end reliability for 3D integration

Eric Beyne, Anne Jourdain, Mirko Scholz, 2016, 2016 IEEE International Reliability Physics Symposium (IRPS).

Implant-Free SiGe Quantum Well pFET: A novel, highly scalable and low thermal budget device, featuring raised source/drain and high-mobility channel

Geert Hellings, Jerome Mitard, Liesbeth Witters, 2010, 2010 International Electron Devices Meeting.

Toward a streamlined projection of small device bias temperature instability lifetime distributions

Philippe Roussel, Tibor Grasser, Guido Groeseneken, 2013 .

Understanding and Modeling the Temperature Behavior of Hot-Carrier Degradation in SiON nMOSFETs

Tibor Grasser, Jacopo Franco, Ben Kaczer, 2016, IEEE Electron Device Letters.

Defect-Centric Distribution of Channel Hot Carrier Degradation in Nano-MOSFETs

Felice Crupi, Jacopo Franco, Ben Kaczer, 2014, IEEE Electron Device Letters.

Channel Hot Carrier Degradation Mechanism in Long/Short Channel $n$-FinFETs

Naoto Horiguchi, Philippe Roussel, Guido Groeseneken, 2013, IEEE Transactions on Electron Devices.

BTI reliability of InGaAs nMOS gate-stack: On the impact of shallow and deep defect bands on the operating voltage range of III-V technology

Dimitri Linten, Guido Groeseneken, Jacopo Franco, 2017, 2017 IEEE International Reliability Physics Symposium (IRPS).

On the Apparent Non-Arrhenius Temperature Dependence of Charge Trapping in IIIV/High- ${k}$ MOS Stack

Dimitri Linten, Guido Groeseneken, Jacopo Franco, 2018, IEEE Transactions on Electron Devices.

Reliable Time Exponents for Long Term Prediction of Negative Bias Temperature Instability by Extrapolation

Dimitri Linten, Guido Groeseneken, Jacopo Franco, 2017, IEEE Transactions on Electron Devices.

Reliability of High Mobility SiGe Channel MOSFETs for Future CMOS Applications

Guido Groeseneken, Jacopo Franco, Ben Kaczer, 2013 .

Toward Understanding Positive Bias Temperature Instability in Fully Recessed-Gate GaN MISFETs

Guido Groeseneken, Jacopo Franco, Denis Marcon, 2016, IEEE Transactions on Electron Devices.

Impact of Si-passivation thickness and processing on NBTI reliability of Ge and SiGe pMOSFETs

Jerome Mitard, Tibor Grasser, Guido Groeseneken, 2009 .

BTI reliability and time-dependent variability of stacked gate-all-around Si nanowire transistors

Naoto Horiguchi, Dimitri Linten, Jacopo Franco, 2017, 2017 IEEE International Reliability Physics Symposium (IRPS).

NBTI in (Si)Ge Channel Devices

Jacopo Franco, Ben Kaczer, 2014 .

Improved PBTI reliability in junction-less nFET fabricated at low thermal budget for 3D Sequential Integration

Dimitri Linten, Anne Vandooren, Philippe Roussel, 2018, 2018 International Integrated Reliability Workshop (IIRW).

Extraction of the Random Component of Time-Dependent Variability Using Matched Pairs

Naoto Horiguchi, Tibor Grasser, Guido Groeseneken, 2015, IEEE Electron Device Letters.