Howard Haynie

RaPiD: AI Accelerator for Ultra-low Precision Training and Inference

Joel Silberman, Swagath Venkataramani, Matthew M. Ziegler, 2021, 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA).

A Scalable Multi-TeraOPS Core for AI Training and Inference

Swagath Venkataramani, Vijayalakshmi Srinivasan, George Gristede, 2018, IEEE Solid-State Circuits Letters.

A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling

Joel Silberman, Swagath Venkataramani, Mingu Kang, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

Efficient AI System Design With Cross-Layer Approximate Computing

Swagath Venkataramani, Xiao Sun, Mingu Kang, 2020, Proceedings of the IEEE.

A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference

Swagath Venkataramani, Xiao Sun, Mingu Kang, 2020, 2020 IEEE Symposium on VLSI Circuits.

A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference

Joel Silberman, Swagath Venkataramani, Matthew M. Ziegler, 2018, 2018 IEEE Symposium on VLSI Circuits.

A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling

Joel Silberman, Swagath Venkataramani, Vijayalakshmi Srinivasan, 2022, IEEE Journal of Solid-State Circuits.