Jeff Zhang

Enabling Timing Error Resilience for Low-Power Systolic-Array Based Deep Learning Accelerators

Kartheek Rangineni, Zahra Ghodsi, Siddharth Garg, 2020, IEEE Design & Test.

ThUnderVolt: Enabling Aggressive Voltage Underscaling and Timing Error Resilience for Energy Efficient Deep Learning Accelerators

Kartheek Rangineni, Zahra Ghodsi, Siddharth Garg, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

ThUnderVolt: Enabling Aggressive Voltage Underscaling and Timing Error Resilience for Energy Efficient Deep Neural Network Accelerators pdf

Jeff Zhang, Kartheek Rangineni, Zahra Ghodsi, 2018, ArXiv.

Analyzing and mitigating the impact of permanent faults on a systolic array based neural network accelerator

Jeff Zhang, Siddharth Garg, Tianyu Gu, 2018, 2018 IEEE 36th VLSI Test Symposium (VTS).

Model-Switching: Dealing with Fluctuating Workloads in Machine-Learning-as-a-Service Systems

Sameh Elnikety, Siddharth Garg, Shuayb Zarar, 2020, HotCloud.

Millimeter Wave Wireless Assisted Robot Navigation With Link State Classification

L. Righetti, S. Rangan, E. Erkip, 2021, IEEE Open Journal of the Communications Society.

Robust Computing for Machine Learning-Based Systems

Muhammad Shafique, Faiq Khalid, Muhammad Abdullah Hanif, 2020, Dependable Embedded Systems.

ThUnderVolt: Enabling Aggressive Voltage Underscaling and Timing Error Resilience for Energy Efficient Deep Learning Accelerators

Kartheek Rangineni, Zahra Ghodsi, Siddharth Garg, 2018, Design Automation Conference.