Bo Wang

Design Challenges and Methodology of High-Performance SRAM-Based Compute-in-Memory for AI Edge Devices

Xin Si, Yufei Wang, Yongliang Zhou, 2021, 2021 International Conference on UK-China Emerging Technologies (UCET).

Design Methodology towards High-Precision SRAM based Computation-in-Memory for AI Edge Devices

Jun Yang, Xin Si, Chen Xue, 2021, 2021 18th International SoC Design Conference (ISOCC).

24.4 Sandwich-RAM: An Energy-Efficient In-Memory BWN Architecture with Pulse-Width Modulation

Jun Yang, Yan Liu, Shouyi Yin, 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

A Booth-based Digital Compute-in-Memory Marco for Processing Transformer Model

Xin Si, An Guo, Bo Wang, 2022, 2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

A 28nm Horizontal-Weight-Shift and Vertical-feature-Shift-Based Separate-WL 6T-SRAM Computation-in-Memory Unit-Macro for Edge Depthwise Neural-Networks

Jun Yang, Xin Si, Chen Xue, 2023, IEEE International Solid-State Circuits Conference.

A 28nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs

X. Chen, Jun Yang, Xin Si, 2023, IEEE International Solid-State Circuits Conference.

A 22-nm FDSOI 8T SRAM Based Time-Domain CIM for Energy-Efficient DNN Accelerators

Yongliang Zhou, Bo Wang, Tianzhu Xiong, 2022, 2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

ShareFloat CIM: A Compute-In-Memory Architecture with Floating-Point Multiply-and-Accumulate Operations

Jun Yang, Xin Si, Chen Xue, 2022, 2022 IEEE International Symposium on Circuits and Systems (ISCAS).