Yuan Wu

A 28nm 1Mb Time-Domain Computing-in-Memory 6T-SRAM Macro with a 6.6ns Latency, 1241GOPS and 37.01TOPS/W for 8b-MAC Operations for Edge-AI Devices

C. Lo, W. Lo, Meng-Fan Chang, 2022, 2022 IEEE International Solid- State Circuits Conference (ISSCC).

A 22nm 4Mb STT-MRAM Data-Encrypted Near-Memory Computation Macro with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b MAC for AI Operations

Y. Chih, C. Lo, Chieh-Pu Lo, 2022, 2022 IEEE International Solid- State Circuits Conference (ISSCC).

Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips

Xin Si, Shyh-Shyuan Sheu, Ting-Wei Chang, 2022, IEEE Journal of Solid-State Circuits.

A CMOS-integrated spintronic compute-in-memory macro for secure AI edge devices

Y. Chih, C. Lo, Chieh-Pu Lo, 2023, Nature Electronics.

An 8b-Precision 6T SRAM Computing-in-Memory Macro Using Time-Domain Incremental Accumulation for AI Edge Chips

C. Lo, C. Hsieh, K. Tang, 2024, IEEE Journal of Solid-State Circuits.