Y. Gohou

A 4M Synapses integrated Analog ReRAM based 66.5 TOPS/W Neural-Network Processor with Cell Current Controlled Writing and Flexible Network Architecture

Ryutaro Yasuhara, Takashi Ono, Reiji Mochida, 2018, 2018 IEEE Symposium on VLSI Technology.

Reliability Issues in Analog ReRAM Based Neural-Network Processor

Ryutaro Yasuhara, Takashi Ono, Reiji Mochida, 2019, 2019 IEEE International Reliability Physics Symposium (IRPS).

Neuromorphic computing based on Analog ReRAM as low power solution for edge application

Ryutaro Yasuhara, Takashi Ono, Reiji Mochida, 2019, 2019 IEEE 11th International Memory Workshop (IMW).

A 0.9-V 1T1C SBT-based embedded nonvolatile FeRAM with a reference voltage scheme and multilayer shielded bit-line structure

S. Iwanari, H. Hirano, T. Nakakuma, 2005, IEEE Journal of Solid-State Circuits.