Yizheng Ye

发表

On-chip DC-DC voltage down converter for low-power IC chip

Mingyan Yu, Qianneng Zhou, Jianguo Ma, 2005, 2005 6th International Conference on ASIC.

Optimal Schemes for ADC BIST Based on Histogram

Yongsheng Wang, Jinxiang Wang, Yizheng Ye, 2005, Asian Test Symposium.

A new retiming algorithm for cycle-time minimization in synchronous logic synthesis

Mingyan Yu, Yizheng Ye, Yan Zhang, 1995, Proceedings of 4th International Conference on Solid-State and IC Technology.

A new synchronization algorithm for VHDL-AMS simulation

Bin Li, Liyi Xiao, Yizheng Ye, 2008, Journal of Computer Science and Technology.

Acquiring rules of selecting cells by using neural network

Yu He, Yizheng Ye, Lihong V. Wang, 1991 .

A new algorithm for retiming-based partial scan

Zhigang Mao, Yizheng Ye, Zulan Huang, 1999, Proceedings Eighth Asian Test Symposium (ATS'99).

A test set embedding approach based on twisted-ring counter with few seeds

Bin Zhou, Xin-chun Wu, Yizheng Ye, 2010, Integr..

A New Mismatch-Dependent Low Power Technique with Shadow Match-Line Voltage-Detecting Scheme for CAMs

Yizheng Ye, Bin-Da Liu, Jianwei Zhang, 2006, ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design.

A CMOS bandpass filter with wide-tuning range for wireless applications

Zhiqiang Gao, Mingyan Yu, Jianguo Ma, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Data value prefetching method based on Markov model

Yizheng Ye, Mingyan Yu, Xuejun Xie, 2006 .

A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends

Zhiqiang Gao, Mingyan Yu, Jianguo Ma, 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

Optimization of Test Power and Data Volume in BIST Scheme Based on Scan Slice Overlapping

Bin Zhou, Liyi Xiao, Xin-chun Wu, 2011, J. Electron. Test..

System design and matching analysis of CMOS RFIC

Mingyan Yu, Jinxiang Wang, Yizheng Ye, 2005, 2005 Asia-Pacific Microwave Conference Proceedings.

Design and implementation of concatenated decoder

Mingyan Yu, Jinxiang Wang, Yizheng Ye, 2002, DCV.

Wide Tuning Range of A CMOS RF Bandpass Filter For Wireless Applications

Zhiqiang Gao, Mingyan Yu, Jianguo Ma, 2005, 2005 IEEE Conference on Electron Devices and Solid-State Circuits.

Parallel behavior-level simulator based on VHDL-AMS [mixed circuit simulation]

Yizheng Ye, Jiafang Wang, Guoyong Huang, 2001, ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549).

A Low-Power Technique Based on Charge Injection and Current-Saving Methods for Match-Line Sensing in Content-Addressable Memories

Yizheng Ye, Bin-Da Liu, Jianwei Zhang, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

CLUCGS and CLUCR - two matrix solution methods for general circuit simulation

Bin Li, Liyi Xiao, Yizheng Ye, 2001, Proceedings. 34th Annual Simulation Symposium.

A RF high-Q on-chip bandpass filter for aerospace wireless applications

Zhiqiang Gao, Mingyan Yu, Yizheng Ye, 2006, 2006 1st International Symposium on Systems and Control in Aerospace and Astronautics.

Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator

Tong Zhou, Mingyan Yu, Yizheng Ye, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

An energy-efficient temporal encoding circuit technique for on-chip high performance buses

Jinxiang Wang, Yizheng Ye, Qingli Zhang, 2006, GLSVLSI '06.

Test Pattern Generation Based on Multi-TRC Scan Architecture for Reducing Test Cost

Bin Zhou, Liyi Xiao, Xin-chun Wu, 2012, J. Low Power Electron..

Design and Realization of a Low Power Register File Using Energy Model

Xuemei Zhao, Yizheng Ye, 2002, PATMOS.

Automatic instruction generation for application specific co-processor

Yizheng Ye, Xiaoming Li, Shengtian Sang, 2005, 2005 6th International Conference on ASIC.

Power efficient high speed switched current comparator

Yong Sun, Yizheng Ye, Fengchang Lai, 2007, 2007 7th International Conference on ASIC.

Compact Channel Noise Models for Deep-Submicron MOSFETs

Mingyan Yu, Jianguo Ma, Yizheng Ye, 2009, IEEE Transactions on Electron Devices.

A Test Architecture for System-on-a-Chip

Liyi Xiao, Yongsheng Wang, Mingyan Yu, 2003, Asian Test Symposium.

Simultaneous reduction in test data volume and test time for TRC-reseeding

Bin Zhou, Yongsheng Wang, Yizheng Ye, 2007, GLSVLSI '07.

A novel common-mode sensing circuit with large input swing for Op-AMP with common-mode feedback

Yizheng Ye, Hua Ma, Minyan Yu, 2007, 2007 7th International Conference on ASIC.

A Current-Recycling Technique for Shadow-Match-Line Sensing in Content-Addressable Memories

Yizheng Ye, Bin-Da Liu, Jianwei Zhang, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Vector quantization by neural network

Yu He, Yizheng Ye, Qianren Zhang, 1990, Medical Imaging.

Test pattern generation for column compression multiplier

Zhigang Mao, Yizheng Ye, Yuliang Deng, 1998, Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259).

Dependency driven partitioning objects generation for hardware/software partitioning

Xiaoming Li, Yizheng Ye, Shengtian Sang, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Self-timed charge recycling search-line drivers in content-addressable memories

Yizheng Ye, Feng Guan, Bin-Da Liu, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A new low power test pattern generator using a variable-length ring counter

Bin Zhou, Xin-chun Wu, Yizheng Ye, 2009, 2009 10th International Symposium on Quality Electronic Design.

Exact BER Analysis of Differential Chaos Shift Keying Communication System in Fading Channels

Jinxiang Wang, Yizheng Ye, Zhibo Zhou, 2008, 2008 4th International Conference on Wireless Communications, Networking and Mobile Computing.

Large tuning band range of high frequency filter for wireless applications

Zhiqiang Gao, Mingyan Yu, Jianguo Ma, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Reducing the logic-level of combinational circuits

Mingyan Yu, Yizheng Ye, Yan Zhang, 1995, Proceedings of 4th International Conference on Solid-State and IC Technology.

A pipelined switched-current chaotic system for the high-speed truly random number generation in crypto processor

Tong Zhou, Mingyan Yu, Yizheng Ye, 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

A decomposition algorithm of VHDL-AMS simulation solver

Yizheng Ye, Jiafang Wang, 2003, ASICON 2003.

Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses

Jinxiang Wang, Yizheng Ye, Qingli Zhang, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

Post linearization of CMOS LNA using double cascade FETs

Mingyan Yu, Byung-Sung Kim, Yizheng Ye, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Delay and Energy Efficient Design of On-Chip Encoded Bus with Repeaters

Jinxiang Wang, Yizheng Ye, Qingli Zhang, 2008, 21st International Conference on VLSI Design (VLSID 2008).

Implementation of Java card Virtual Machine

Zhigang Mao, Yizheng Ye, Liu Songyan, 2008, Journal of Computer Science and Technology.

Reduction of Test Power and Data Volume in BIST Scheme based on Scan Slice Overlapping

Bin Zhou, Xin-chun Wu, Yizheng Ye, 2009, ISCAS.

A CMOS RF bandpass filter based on the active inductor

Mingyan Yu, Jianguo Ma, Yizheng Ye, 2005, 2005 6th International Conference on ASIC.

A Robust High-Speed Chaos-Based Truly Random Number Generator for Embedded Cryptosystems

Mingyan Yu, Yizheng Ye, Tong Zhou, 2006, 2006 49th IEEE International Midwest Symposium on Circuits and Systems.