Son Dao Trong

Method for executing a load instruction in a pipeline processor, putting the data in the target address into a buffer then loading the requested data.

Eric M. Schwarz, Michael Klein, David S. Hutton, 2008 .

A 60 × 58 Integrated Multiplier

Son Dao Trong, Klaus Helwig, Klaus Getzlaff, 1989, ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference.

A single-chip IBM System/390 floating-point processor in CMOS

Son Dao Trong, Klaus Helwig, 1992, IBM J. Res. Dev..

Hardware implementations of denormalized numbers

Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong, 2003, Proceedings 2003 16th IEEE Symposium on Computer Arithmetic.

P6 Binary Floating-Point Unit

Eric M. Schwarz, Martin S. Schmookler, Michael Kroener, 2007, 18th IEEE Symposium on Computer Arithmetic (ARITH '07).

FPU implementations with denormalized numbers

Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong, 2005, IEEE Transactions on Computers.

Binary Floating-Point Unit

Michael Kroener, Son Dao Trong, Martin Schmookler, 2007 .