Prateek Gupta

PVT Variations Aware Robust Transistor Sizing for Power-Delay Optimal CMOS Digital Circuit Design

Zia Abbas, Harshini Mandadapu, Shirisha Gourishetty, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

Robust Transistor Sizing for Improved Performances in Digital Circuits using Optimization Algorithms

Zia Abbas, Prateek Gupta, Harshini Mandadapu, 2019, 20th International Symposium on Quality Electronic Design (ISQED).

A new medical image encryption algorithm based on the 1D logistic map associated with pseudo-random numbers

Manish Kumar, Prateek Gupta, Manish Kumar, 2021, Multimedia Tools and Applications.

Multi-Objective Optimization Algorithm Based Transistor Sizing for Improved Power-Delay-Area in Digital Circuits

Prateek Gupta, Zia Abbas, Zia Abbas, 2018, 2018 15th IEEE India Council International Conference (INDICON).

Automatic Verification of Parameterized Data Structures

Jyotirmoy V. Deshmukh, E. Allen Emerson, Prateek Gupta, 2006, TACAS.

Towards computationally sound symbolic analysis of key exchange protocols

Vitaly Shmatikov, Prateek Gupta, Vitaly Shmatikov, 2005, FMSE '05.

Design and Implementation of Router for NOC on FPGA

Gaurav Verma, Harsh Agarwal, Shreya Singh, 2016 .

Binary rewriting and call interception for efficient runtime protection against buffer overflows

D. Gupta, Prateek Gupta, K. Avijit, 2006, Softw. Pract. Exp..

TIED, LibsafePlus: Tools for Runtime Buffer Overflow Protection

Deepak Gupta, Kumar Avijit, Prateek Gupta, 2004, USENIX Security Symposium.

Key confirmation and adaptive corruptions in the protocol security logic

Vitaly Shmatikov, Prateek Gupta, Vitaly Shmatikov, 2006, IACR Cryptol. ePrint Arch..