Y. Choung

Operational modeling and simulation of an inter-bay AMHS in semiconductor wafer fabrication

Gerald T. Mackulak, John W. Fowler, Dong-Jin Kim, 2002, Proceedings of the Winter Simulation Conference.

Minimizing makespan on a single burn-in oven in semiconductor manufacturing

C. S. Sung, Y. I. Choung, C. Sung, 2000, Eur. J. Oper. Res..

Minimizing earliness–tardiness on a single burn-in oven with a common due date and maximum allowable tardiness constraint

Lars Mönch, You In Choung, Robert Unbehaun, 2006, OR Spectr..