Masanori Kuwahara

Design and verification methods of toshiba's wireless LAN baseband SoC

Masanori Kuwahara, 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

The Phase Locked Loop for Clock Recovery Used in a Single-Chip 4-Channel 155Mb/s CMOS ATM Physical Layer Controller LSI(Special Issue on Multimedia, Network, and DRAM LSIs)

Takeshi Ogawara, Naoki Sugawa, Satoshi Oda, 1998 .

A 7uW deep-sleep, ultra low-power WLAN baseband LSI for mobile applications

Hirotsugu Kajihara, Yasuo Unekawa, Toshio Fujisawa, 2011, 2011 IEEE Cool Chips XIV.