R. Póvoa

发表

Integrated Prototypes and Experimental Evaluation

Ricardo Povoa, Nuno Horta, Joao Goes, 2018, A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain.

Background and State-of-the-Art

Ricardo Povoa, Nuno Horta, Joao Goes, 2018, Tunable Low-Power Low-Noise Amplifier for Healthcare Applications.

A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis

Ricardo Povoa, Nuno Horta, Nuno Lourenço, 2013, 2013 IEEE Congress on Evolutionary Computation.

Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel

Ricardo Povoa, Nuno Horta, Nuno Lourenço, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Proposed Design and Implementation

Ricardo Povoa, Nuno Horta, Nuno Lourenço, 2021 .

Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques

Ricardo Povoa, Nuno Horta, Nuno Lourenço, 2016, Integr..

Design Optimization and Results

Ricardo Povoa, Nuno Horta, Joao Goes, 2018, A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain.

AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation

Ricardo Povoa, Nuno Horta, Nuno Lourenço, 2016, Integr..

A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications

Ricardo Povoa, Joao Goes, Nuno Horta, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Current-flow and current-density-aware multi-objective optimization of analog IC placement

Ricardo Povoa, Nuno Horta, Nuno Lourenço, 2016, Integr..

Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing

Nuno Horta, Fábio Passos, Günhan Dündar, 2019, 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).

On the Exploration of Promising Analog IC Designs via Artificial Neural Networks

Ricardo Povoa, Nuno Horta, Nuno Lourenço, 2018, 2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).

Shortening the gap between pre- and post-layout analog IC performance by reducing the LDE-induced variations with multi-objective simulated quantum annealing

Ricardo Povoa, Nuno Horta, Nuno Lourenco, 2021, Eng. Appl. Artif. Intell..

DeepPlacer: A custom integrated OpAmp placement tool using deep models

N. Horta, N. Lourenço, R. Martins, 2021, Appl. Soft Comput..

FUZYE: A Fuzzy ${c}$ -Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms

Ricardo Povoa, Nuno Horta, João Paulo Carvalho, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology

Francisco V. Fernández, Ricardo Povoa, Nuno Horta, 2018, Integr..

New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization

Francisco V. Fernández, Ricardo Povoa, Nuno Horta, 2017, 2017 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).

On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects

Nuno Horta, Ricardo Martins, Nuno Lourenço, 2019, 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).

Semi-Supervised Artificial Neural Networks towards Analog IC Placement Recommender

António Gusmão, Ricardo Povoa, Nuno Horta, 2020, 2020 IEEE International Symposium on Circuits and Systems (ISCAS).

Artificial Neural Networks as an Alternative for Automatic Analog IC Placement

Nuno Horta, Ricardo Martins, Nuno Lourenço, 2019, 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).

Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving

N. Horta, J. Goes, R. Martins, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement

Joao Goes, Ricardo Martins, Nuno Lourenço, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations

Ricardo Povoa, Nuno Horta, Nuno Lourenço, 2016, 2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).