P.W. Liu

Schottky Source/Drain CMOS Device Optimization with Dopant-Segregated NiPt Silicide

Y.T. Huang, P.W. Liu, W.T. Chiang, 2008, 2008 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).

18.3 Superior Current Enhancement in SiGe Channel p-MOSFETs Fabricated on [110] Surface

Y.C. Liu, P.W. Liu, W.T. Chiang, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Improved Layout Dependence in High Performance SiGe Channel CMOSFETs

Y.T. Huang, P.W. Liu, W.T. Chiang, 2008, 2008 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).

Optimal PD-SOI Technology for High Performance Applications

Y.T. Huang, P.W. Liu, W.T. Chiang, 2008, 2008 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).

SiGe Channel CMOSFETs Fabricated on (110) Surfaces with TaC/HfO2 Gate Stacks

L.W. Cheng, P.W. Liu, W.T. Chiang, 2007, 2007 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).

Unique Ultra Shallow Junction Scheme with Conventional Activation Process

Y.C. Liu, P.W. Liu, W.T. Chiang, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

A new observation of strain-induced slow traps in advanced CMOS technology with process-induced strain using random telegraph noise measurement

S.S. Chung, P.W. Liu, C.H. Tsai, 2006, 2009 Symposium on VLSI Technology.

Strain Effects of Si and SiGe Channel on (100) and (110) Si Surfaces for Advanced CMOS Applications

P.W. Liu, W.T. Chiang, C.H. Tsai, 2007, 2007 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).