S.K. Hsu

A 200mV to 1.2V, 4.4MHz to 6.3GHz, 48×42b 1R/1W programmable register file in 65nm CMOS

A. Agarwal, R.K. Krishnamurthy, N. Banerjee, 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

A 4.5 GHz 130 nm 32 KB L0 cache with a self reverse bias scheme

A. Alvandpour, S. Borkar, S. Mathew, 2002, 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302).

A 1.9 Gb/s 358 mW 16–256 State Reconfigurable Viterbi Accelerator in 90 nm CMOS

S. Borkar, R.K. Krishnamurthy, S.K. Mathew, 2008, IEEE Journal of Solid-State Circuits.

High-performance and low-voltage challenges for sub-45nm microprocessor circuits

S. Borkar, R.K. Krishnamurthy, S.K. Mathew, 2005, 2005 6th International Conference on ASIC.

A 320 mV 56 μW 411 GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65 nm CMOS

S. Borkar, R.K. Krishnamurthy, S.K. Mathew, 2009, IEEE Journal of Solid-State Circuits.

High performance GaInP/GaAs HBT radio frequency integrated circuits at 5 GHz

Guo-Wei Huang, Chinchun Meng, Shih-An Yu, 2005, 2005 Asia-Pacific Microwave Conference Proceedings.

A fully integrated 5.2 GHz GaInP/GaAs HBT upconversion micromixer with output LC current combiner and oscillator

G.W. Huang, S.K. Hsu, C.C. Meng, 2003, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003.

A Dual-Supply 4GHz 13fJ/bit/search 64×128b CAM in 65nm CMOS

Himanshu Kaul, A. Agarwal, R.K. Krishnamurthy, 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.