Gyu-Seob Jeong

An Optimum Loop Gain Tracking All-Digital PLL Using Autocorrelation of Bang–Bang Phase-Frequency Detection

Deog-Kyoon Jeong, Gyu-Seob Jeong, Sang-Hyeok Chu, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

A Crystal-Less Programmable Clock Generator with RC-LC Hybrid Oscillator for GHz Applications in 14 nm FinFET CMOS

D. Jeong, Wooseok Kim, Taeik Kim, 2018, 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS).

Test of the VCSEL driver based on Verilog-A VCSEL model

Yoonsoo Kim, Gyungock Kim, D. Jeong, 2015, 2015 International SoC Design Conference (ISOCC).

A 35-Gb/s 0.65-pJ/b Asymmetric Push-Pull Inverter-Based VCSEL Driver With Series Inductive Peaking in 65-nm CMOS

Deog-Kyoon Jeong, Gyu-Seob Jeong, Jeongho Hwang, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

Reference Spur Reduction Techniques for a Phase-Locked Loop

Deog-Kyoon Jeong, Gyu-Seob Jeong, Han-Gon Ko, 2019, IEEE Access.