D. Birreck

Ein Hardwarecompiler zur restklassenbasierten Schaltungssynthese

W. Anheier, A. Drolshagen, D. Birreck, 1996 .

VLSI architecture for a convolution-based DCT in residue arithmetic

D. Birreck, R. Laur, R. Klaassen, 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

Classification for 2D-DCTs and a new architecture with distributed arithmetic

D. Birreck, R. Laur, S. Wolter, 1991, 1991., IEEE International Sympoisum on Circuits and Systems.

Parallel architectures for 8*8 discrete cosine transforms

Rainer Laur, Stefan Wolter, D. Birreck, 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.