Jixuan Xiang

A 7.9-fJ/conversion-step 8-b 400-MS/s 2-b-per-cycle SAR ADC with A preset capacitive DAC

Fan Ye, Jian Mei, Hao Chang, 2013, 2013 IEEE 10th International Conference on ASIC.

A 4-mW8-b 600-MS/s 2-b-per-cycle SAR ADC with a capacitive DAC

Junyan Ren, Fan Ye, Huabin Chen, 2013, 2013 IEEE 10th International Conference on ASIC.

A foreground digital calibration by switching control scheme for A 12-bit SAR ADC

Fan Ye, Jun Xu, Junyan Ren, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A capacitive DAC with custom 3-D 1-fF MOM unit capacitors optimized for fast- settling routing in high speed SAR ADCs

Jun Xu, Ning Li, Fan Ye, 2015 .

A 6-b 600 MS/s SAR ADC with a new switching procedure of 2-b/stage and self-locking comparators*

Jun Xu, Ning Li, Fan Ye, 2015 .

An 8-bit 1-GS/s flash-assisted time-interleaved SAR ADC

Fan Ye, Jun Xu, Junyan Ren, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A 270-MS/s 6-b SAR ADC with preamplifier sharing and self-locking comparators

Jiang Fan, Ye Fan, Junyan Ren, 2015, IEICE Electron. Express.

An analog front end with a 12-bit 3.2-MS/s SAR ADC for a power line communication system

Jun Xu, Fan Ye, Junyan Ren, 2014 .