Jung Sunwoo

A 800Mb/s/pin 2GB DDR2 SDRAM using an 80nm triple metal technology

Jae Young Lee, Kye Hyun Kyung, Chi Wook Kim, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW

Ki-Whan Song, Young-Hyun Jun, Jaewhan Kim, 2011, 2011 IEEE International Solid-State Circuits Conference.

A 20GB/s 256MB DRAM with an inductorless quadrature PLL and a cascaded pre-emphasis transmitter

Hoon Lee, Soo-In Cho, Jung-Hwan Choi, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

BER Measurement of a 5.8-Gb/s/pin Unidirectional Differential I/O for DRAM Application With DIMM Channel

Jung Sunwoo, Young-Chan Jang, Yun-Sang Lee, 2009, IEEE Journal of Solid-State Circuits.

Channel BER Measurement for a 5.8Gb/s/pin unidirectional differential I/O for DRAM application

Jung Sunwoo, Yun-Sang Lee, Sang-Yun Kim, 2008, 2008 IEEE Asian Solid-State Circuits Conference.

An 8Gb/s/pin 9.6ns Row-Cycle 288Mb Deca-Data Rate SDRAM with an I/O Error-Detection Scheme

Kee-Won Kwon, Jung Sunwoo, Jin-Young Kim, 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth

Qi Wang, Jaewhan Kim, Jinyoung Kim, 2012, 2012 IEEE International Solid-State Circuits Conference.