H. Mrabet

发表

FPGA Interconnect Topologies Exploration

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2009, Int. J. Reconfigurable Comput..

Efficient Mesh of Tree Interconnect for FPGA Architecture

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2007, 2007 International Conference on Field-Programmable Technology.

Mesh of Tree: Unifying Mesh and MFPGA for Better Device Performances

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2007, First International Symposium on Networks-on-Chip (NOCS'07).

Performances comparison between multilevel hierarchical and mesh FPGA interconnects

Z. Marrakchi, H. Mehrez, H. Mrabet, 2006, International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006..

Performances improvement of FPGA using novel multilevel hierarchical interconnection structure

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.

FPGA Interconnect Topologies Exploration

Umer Farooq, H. Mehrez, Z. Marrakchi, 2009 .

Performances improvement ofFPGAusingnovelmultilevel hierarchical interconnection structure

H. Mrabet, 2006 .

Improving the Security of Dual Rail Logic in FPGA Using Controlled Placement and Routing

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

Placement and routing techniques to improve delay balance of WDDL netlist in MFPGA

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

The Effect of LUT and Cluster Size on a Tree Based FPGA Architecture

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2008, 2008 International Conference on Reconfigurable Computing and FPGAs.

Optimized local interconnect for cluster-based Mesh FPGA architecture

Z. Marrakchi, H. Mehrez, H. Mrabet, 2008, 2008 International Conference on Microelectronics.

Evaluation of Hierarchical FPGA partitioning methodologies based on architecture Rent Parameter

Z. Marrakchi, H. Mehrez, H. Mrabet, 2006, 2006 Ph.D. Research in Microelectronics and Electronics.

Hierarchical FPGA clustering based on multilevel partitioning approach to improve routability and reduce power dissipation

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2005, 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05).

Hierarchical FPGA clustering to improve routability

Z. Marrakchi, H. Mehrez, H. Mrabet, 2005, Research in Microelectronics and Electronics, 2005 PhD.

Automatic layout of scalable embedded field programmable gate array

Z. Marrakchi, H. Mehrez, H. Mrabet, 2004, International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04..

Efficient tree topology for FPGA interconnect network

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2008, ACM Great Lakes Symposium on VLSI.