Hon-Jarn Lin

A Reflow-capable, Embedded 8Mb STT-MRAM Macro with 9nS Read Access Time in 16nm FinFET Logic CMOS Process

Y. Chih, Chieh-Pu Lo, H. Chuang, 2020, 2020 IEEE International Electron Devices Meeting (IEDM).

Low-Power Multiport SRAM With Cross-Point Write Word-Lines, Shared Write Bit-Lines, and Shared Write Row-Access Transistors

Ching-Te Chuang, Wei Hwang, Hon-Jarn Lin, 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

33.1 A 16nm 32Mb Embedded STT-MRAM with a 6ns Read-Access Time, a 1M-Cycle Write Endurance, 20-Year Retention at 150°C and MTJ-OTP Solutions for Magnetic Immunity

Y. Chih, C. Kuo, Yih Wang, 2023, 2023 IEEE International Solid- State Circuits Conference (ISSCC).

13.3 A 22nm 32Mb Embedded STT-MRAM with 10ns Read Speed, 1M Cycle Write Endurance, 10 Years Retention at 150°C and High Immunity to Magnetic Field Interference

Yu-Lin Chen, Harry Chuang, Yu-Der Chih, 2020, 2020 IEEE International Solid- State Circuits Conference - (ISSCC).