G.H. Koh

PRAM process technology

S.Y. Lee, J.H. Park, H.S. Jeong, 2004, 2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866).

Future memory technology including emerging new memories

G.H. Koh, K. Kim, 2004, 2004 24th International Conference on Microelectronics (IEEE Cat. No.04TH8716).

Process technologies for the integration of high density phase change RAM

S.Y. Lee, Kinam Kim, J.H. Park, 2005, 2005 International Conference on Integrated Circuit Design and Technology, 2005. ICICDT 2005..

High density integration of low current phase-change RAM using structural modification based on 0.18 /spl mu/m-CMOS technologies

Y.T. Kim, S.Y. Lee, H.J. Kim, 2004, 2004 24th International Conference on Microelectronics (IEEE Cat. No.04TH8716).

A 0.15 /spl mu/m DRAM technology node for 4 Gb DRAM

B.J. Park, K.N. Kim, H.S. Jeong, 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

Full integration and reliability evaluation of phase-change RAM based on 0.24 /spl mu/m-CMOS technologies

Y.T. Kim, S.Y. Lee, H.J. Kim, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

Full integration and cell characteristics for 64Mb nonvolatile PRAM

S.Y. Lee, Kinam Kim, H.S. Jeong, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Integration technologies for scalable high density MRAM

Jonghyun Park, S.Y. Lee, Kinam Kim, 2005, IEEE VLSI-TSA International Symposium on VLSI Technology, 2005. (VLSI-TSA-Tech)..

Highly scalable and CMOS-compatible STTM cell technology

Kinam Kim, H.S. Jeong, S.J. Ahn, 2003, IEEE International Electron Devices Meeting 2003.