G.T. Jeong

发表

S.Y. Lee, J.H. Park, H.S. Jeong, 2004, 2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866).

Process technologies for the integration of high density phase change RAM

S.Y. Lee, Kinam Kim, J.H. Park, 2005, 2005 International Conference on Integrated Circuit Design and Technology, 2005. ICICDT 2005..

MLC PRAM with SLC write-speed and robust read scheme

Y.N. Hwang, G.T. Jeong, H.S. Jeong, 2010, 2010 Symposium on VLSI Technology.

High density integration of low current phase-change RAM using structural modification based on 0.18 /spl mu/m-CMOS technologies

Y.T. Kim, S.Y. Lee, H.J. Kim, 2004, 2004 24th International Conference on Microelectronics (IEEE Cat. No.04TH8716).

A 0.15 /spl mu/m DRAM technology node for 4 Gb DRAM

B.J. Park, K.N. Kim, H.S. Jeong, 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

Full integration and reliability evaluation of phase-change RAM based on 0.24 /spl mu/m-CMOS technologies

Y.T. Kim, S.Y. Lee, H.J. Kim, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

Full integration and cell characteristics for 64Mb nonvolatile PRAM

S.Y. Lee, Kinam Kim, H.S. Jeong, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Integration technologies for scalable high density MRAM

Jonghyun Park, S.Y. Lee, Kinam Kim, 2005, IEEE VLSI-TSA International Symposium on VLSI Technology, 2005. (VLSI-TSA-Tech)..

Integration and cell characteristics for high density PRAM

J.H. Park, K.N. Kim, S.J. Ahn, 2004, Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850).

A DRAM technology using MIM BST capacitor for 0.15 /spl mu/m DRAM generation and beyond

Y.S. Hwang, B.J. Park, K.N. Kim, 1999, 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325).

A strategy for long data retention time of 512 Mb DRAM with 0.12 /spl mu/m design rule

S.H. Hong, Kinam Kim, G.T. Jeong, 2001, 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184).

Advanced ring type contact technology for high density phase change memory

S.Y. Lee, K.N. Kim, S.J. Ahn, 2005, Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005..

A process integration of high performance 64 Kb MRAM

S.Y. Lee, Kinam Kim, G.T. Jeong, 2003, Digest of INTERMAG 2003. International Magnetics Conference (Cat. No.03CH37401).

Phase-change chalcogenide nonvolatile RAM completely based on CMOS technology

Y.T. Kim, S.Y. Lee, S.O. Park, 2003, 2003 International Symposium on VLSI Technology, Systems and Applications. Proceedings of Technical Papers. (IEEE Cat. No.03TH8672).

An 8F/sup 2/ MRAM technology using modified metal lines

G.T. Jeong, J.E. Lee, W.C. Jeong, 2003, IEEE International Electron Devices Meeting 2003.

Fully integrated 64 Kb MRAM with novel reference cell scheme

H.J. Kim, S.O. Park, S.J. Ahn, 2002, Digest. International Electron Devices Meeting,.

Investigation of pMOSFET Hot Electron Induced Punch Through (HEIP) in Shallow Trench Isolation

Kinam Kim, G.T. Jeong, T.Y. Chung, 2001, 31st European Solid-State Device Research Conference.

Writing current reduction for high-density phase-change RAM

S.Y. Lee, S.J. Ahn, Kinam Kim, 2003, IEEE International Electron Devices Meeting 2003.