Antonis M. Paschalis

发表

A concurrent BIST scheme for on-line/off-line testing based on a pre-computed test set

Constantin Halatsis, Dimitris Gizopoulos, Ioannis Voyiatzis, 2005, IEEE International Conference on Test, 2005..

An Efficient TSC 1-out-of-3 Code Checker

Constantin Halatsis, Antonis M. Paschalis, Costas Efstathiou, 1990, IEEE Trans. Computers.

On-Line Periodic Self-Testing of High-Speed Floating-Point Units in Microprocessors

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2007, 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007).

Software-Based Self Test Methodology for On-Line Testing of L1 Caches in Multithreaded Multicore Architectures

Dimitris Gizopoulos, Antonis M. Paschalis, Giorgos Theodorou, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An Input Vector Monitoring Concurrent BIST scheme exploiting “X” values

Dimitris Gizopoulos, Ioannis Voyiatzis, Antonis M. Paschalis, 2009, 2009 15th IEEE International On-Line Testing Symposium.

An efficient comparative concurrent Built-In Self-Test technique

Themistoklis Haniotakis, Constantin Halatsis, Ioannis Voyiatzis, 1995, Proceedings of the Fourth Asian Test Symposium.

Functional Self-Testing for Bus-Based Symmetric Multiprocessors

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2008, 2008 Design, Automation and Test in Europe.

Totally Self Checking reconfigurable duplication system with separate internal fault indication

Antonis M. Paschalis, Nikolaos Gaitanis, Panagiotis Kostarakis, 1995, Proceedings of the Fourth Asian Test Symposium.

Efficient Modular Design of TSC Checkers for M-out-of-2M Codes

Constantin Halatsis, Antonis M. Paschalis, Dimitris Nikolos, 1988, IEEE Trans. Computers.

Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2006, IEEE Transactions on Computers.

Instruction-Based Self-Testing of Processor Cores

Yervant Zorian, Dimitris Gizopoulos, Antonis M. Paschalis, 2003, J. Electron. Test..

Accumulator Based 3-Weight Pattern Generation

Dimitris Gizopoulos, Ioannis Voyiatzis, Antonis M. Paschalis, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Test Generation and Fault Simulation for Cell Fault Model using Stuck-at Fault Model based Test Tools

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 1998, J. Electron. Test..

Robust sequential fault testing of iterative logic arrays

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 1997, Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125).

An effective BIST scheme for Booth multipliers

Yervant Zorian, Dimitris Gizopoulos, Antonis M. Paschalis, 1995, Proceedings of 1995 IEEE International Test Conference (ITC).

An effective BIST architecture for fast multiplier cores

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

Systematic Software-Based Self-Test for Pipelined Processors

Srivaths Ravi, Anand Raghunathan, Mihalis Psarakis, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An Effective Built-In Self-Test Scheme for Parallel Multipliers

Yervant Zorian, Dimitris Gizopoulos, Antonis M. Paschalis, 1999, IEEE Trans. Computers.

Low power/energy BIST scheme for datapaths

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 2000, Proceedings 18th IEEE VLSI Test Symposium.

Selecting Power-Optimal SBST Routines for On-Line Processor Testing

Dimitris Gizopoulos, Antonis M. Paschalis, Nektarios Kranitis, 2007, 12th IEEE European Test Symposium (ETS'07).

Effective software-based self-test strategies for on-line periodic testing of embedded processors

Dimitris Gizopoulos, Antonis M. Paschalis, D. Gizopoulos, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Test generation methodology for high-speed floating point adders

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2005, 11th IEEE International On-Line Testing Symposium.

A single chip dependable and adaptable payload Data Processing Unit

Antonis M. Paschalis, Ioannis Sideris, Nektarios Kranitis, 2015, 2015 IEEE 21st International On-Line Testing Symposium (IOLTS).

An efficient built-in self test method for robust path delay fault testing

Constantin Halatsis, Ioannis Voyiatzis, Antonis M. Paschalis, 1996, J. Electron. Test..

Low Energy On-Line SBST of Embedded Processors

Dimitris Gizopoulos, Antonis M. Paschalis, Nektarios Kranitis, 2008, 2008 IEEE International Test Conference.

Efficient Modular Design of TSC Checkers for M-out-of-2M Codes

Constantin Halatsis, Antonis M. Paschalis, Dimitris Nikolos, 1986, Aegean Workshop on Computing.

Low-cost, on-line software-based self-testing of embedded processor cores

Dimitris Gizopoulos, Antonis M. Paschalis, George Xenoulis, 2003, 9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003..

An effective BIST scheme for datapaths

Yervant Zorian, Dimitris Gizopoulos, Antonis M. Paschalis, 1996, Proceedings International Test Conference 1996. Test and Design Validity.

Functional Processor-Based Testing of Communication Peripherals in Systems-on-Chip

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Testing combinational iterative logic arrays for realistic faults

Dimitris Gizopoulos, Antonis M. Paschalis, Dimitris Nikolos, 1995, Proceedings 13th IEEE VLSI Test Symposium.

Power-aware optimization of software-based self-test for L1 caches in microprocessors

Dimitris Gizopoulos, Antonis M. Paschalis, Nektarios Kranitis, 2014, 2014 IEEE 20th International On-Line Testing Symposium (IOLTS).

Deterministic software-based self-testing of embedded processor cores

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

Systematic Software-Based Self-Test for Pipelined Processors

Michail Maniatakos, Srivaths Ravi, Anand Raghunathan, 2008, IEEE Trans. Very Large Scale Integr. Syst..

Instruction-based self-testing of processor cores

Yervant Zorian, Dimitris Gizopoulos, Antonis M. Paschalis, 2002, Proceedings 20th IEEE VLSI Test Symposium (VTS 2002).

An asynchronous totally self-checking two-rail code error indicator

Dimitris Gizopoulos, Antonis M. Paschalis, Nikolaos Gaitanis, 1996, Proceedings of 14th VLSI Test Symposium.

Effective low power BIST for datapaths (poster paper)

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 2000, DATE '00.

Built-in sequential fault self-testing of array multipliers

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Accumulator-based weighted pattern generation

Dimitris Gizopoulos, Ioannis Voyiatzis, Antonis M. Paschalis, 2005, 11th IEEE International On-Line Testing Symposium.

A totally self-checking 1-out-of-3 code error indicator

Dimitris Gizopoulos, Antonis M. Paschalis, Nikolaos Gaitanis, 1997, Proceedings European Design and Test Conference. ED & TC 97.

Software-Based Self-Testing of Symmetric Shared-Memory Multiprocessors

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2009, IEEE Transactions on Computers.

Instruction-Based Online Periodic Self-Testing of Microprocessors with Floating-Point Units

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2009, IEEE Transactions on Dependable and Secure Computing.

Special session 4B: Elevator talks

Michail Maniatakos, Masahiro Fujita, Adit D. Singh, 2013, VTS.

Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 2000, IEEE Trans. Computers.

Accumulator-based BIST approach for stuck-open and delay fault testing

Constantin Halatsis, Ioannis Voyiatzis, Antonis M. Paschalis, 1995, Proceedings the European Design and Test Conference. ED&TC 1995.

Optimal Periodic Testing of Intermittent Faults In Embedded Pipelined Processor Applications

Constantin Halatsis, Dimitris Gizopoulos, Antonis M. Paschalis, 2006, Proceedings of the Design Automation & Test in Europe Conference.

A Totally Self-Checking 1-out-of-3 Code Error Indicator

Dimitris Gizopoulos, Antonis M. Paschalis, Nikolaos Gaitanis, 1998, J. Electron. Test..

Recursive Pseudo-Exhaustive Two-Pattern Generation

Dimitris Gizopoulos, Ioannis Voyiatzis, Antonis M. Paschalis, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Robustly testable array multipliers under realistic sequential cell fault model

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 1998, Proceedings. 16th IEEE VLSI Test Symposium (Cat. No.98TB100231).

Concurrent Delay Testing in Totally Self-Checking Systems

Dimitris Gizopoulos, Antonis M. Paschalis, Nikolaos Gaitanis, 1998, J. Electron. Test..

Robust and low-cost BIST architectures for sequential fault testing in datapath multipliers

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 2001, Proceedings 19th IEEE VLSI Test Symposium. VTS 2001.

Online error detection in multiprocessor chips: A test scheduling study

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2013, 2013 IEEE 19th International On-Line Testing Symposium (IOLTS).

A Software-Based Self-Test methodology for on-line testing of processor caches

Dimitris Gizopoulos, Antonis M. Paschalis, Nektarios Kranitis, 2011, 2011 IEEE International Test Conference.

A concurrent built-in self-test architecture based on a self-testing RAM

Constantin Halatsis, Dimitris Gizopoulos, Ioannis Voyiatzis, 2005, IEEE Transactions on Reliability.

Easily Testable Cellular Carry Lookahead Adders

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 2003, J. Electron. Test..

Hybrid-SBST Methodology for Efficient Testing of Processor Cores

Dimitris Gizopoulos, Antonis M. Paschalis, Nektarios Kranitis, 2008, IEEE Design & Test of Computers.

Low-Cost Software-Based Self-Testing of RISC Processor Cores

Yervant Zorian, Dimitris Gizopoulos, Antonis M. Paschalis, 2003, DATE.

A software-based self-test methodology for in-system testing of processor cache tag arrays

Dimitris Gizopoulos, Antonis M. Paschalis, Nektarios Kranitis, 2010, 2010 IEEE 16th International On-Line Testing Symposium.

An effective BIST architecture for sequential fault testing in array multipliers

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 1999, Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146).

An Input Vector Monitoring Concurrent BIST Architecture Based on a Precomputed Test Set

Constantin Halatsis, Dimitris Gizopoulos, Ioannis Voyiatzis, 2008, IEEE Transactions on Computers.

Software-based self-test for pipelined processors: a case study

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2005, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05).

C-Testable modified-Booth multipliers

Constantin Halatsis, Dimitris Gizopoulos, Antonis M. Paschalis, 1996, J. Electron. Test..

Accumulator-based test generation for robust sequential fault testing in DSP cores in near-optimal time

Dimitris Gizopoulos, Ioannis Voyiatzis, Antonis M. Paschalis, 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An effective deterministic BIST scheme for shifter/accumulator pairs in datapaths

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 2001, Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design.

Energy optimal on-line Self-Test of microprocessors in WSN nodes

Dimitris Gizopoulos, Antonis M. Paschalis, Nektarios Kranitis, 2010, 2010 IEEE International Conference on Computer Design.

An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 2001, J. Electron. Test..

Application and analysis of rt-level software-based self-testing for embedded processor cores

Yervant Zorian, Dimitris Gizopoulos, Antonis M. Paschalis, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

A low-cost SEU fault emulation platform for SRAM-based FPGAs

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

An effective BIST scheme for arithmetic logic units

Yervant Zorian, Mihalis Psarakis, Dimitris Gizopoulos, 1997, Proceedings International Test Conference 1997.

Testing CMOS combinational iterative logic arrays for realistic faults

Dimitris Gizopoulos, Antonis M. Paschalis, Dimitris Nikolos, 1996, Integr..

Exploiting Thread-Level Parallelism in Functional Self-Testing of CMT Processors

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, 2009, 2009 14th IEEE European Test Symposium.

Software-Based Self-Test for Small Caches in Microprocessors

Dimitris Gizopoulos, Antonis M. Paschalis, Nektarios Kranitis, 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

R-CBIST: an effective RAM-based input vector monitoring concurrent BIST technique

Constantin Halatsis, Ioannis Voyiatzis, Antonis M. Paschalis, 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

Efficient Totally Self-Checking Checkers for a Class of Borden Codes

Themistoklis Haniotakis, Antonis M. Paschalis, Dimitris Nikolos, 1995, IEEE Trans. Computers.

An Accumulator-Based BIST Approach for Two-Pattern Testing

Constantin Halatsis, Ioannis Voyiatzis, Antonis M. Paschalis, 1999, J. Electron. Test..

On TSC Checkers for m-out-n Codes

Vassilios V. Dimakopoulos, Antonis M. Paschalis, Dimitris Nikolos, 1995, IEEE Trans. Computers.

SBST for on-line detection of hard faults in multiprocessor applications under energy constraints

Dionisis Margaris, Dimitris Gizopoulos, Antonis M. Paschalis, 2010, 2010 IEEE 16th International On-Line Testing Symposium.

Dependable Multicore Architectures at Nanoscale: The View From Europe

Mehdi Baradaran Tahoori, Lorena Anghel, Marco Ottavi, 2015, IEEE Design & Test.

A Software-Based Self-Test methodology for on-line testing of data TLBs

Dimitris Gizopoulos, Antonis M. Paschalis, Nektarios Kranitis, 2012, 2012 17th IEEE European Test Symposium (ETS).

Effective Built-In Self-Test for Booth Multipliers

Yervant Zorian, Dimitris Gizopoulos, Antonis M. Paschalis, 1998, IEEE Des. Test Comput..

Dependable reconfigurable space systems: Challenges, new trends and case studies

Pedro Reviriego, Antonis M. Paschalis, Celia López-Ongil, 2014, 2014 IEEE 20th International On-Line Testing Symposium (IOLTS).

Software-based self-testing of embedded processors

Dimitris Gizopoulos, Antonis M. Paschalis, George Xenoulis, 2005, IEEE Transactions on Computers.

Effective software self-test methodology for processor cores

Yervant Zorian, Dimitris Gizopoulos, Antonis M. Paschalis, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Low Energy Online Self-Test of Embedded Processors in Dependable WSN Nodes

Dimitris Gizopoulos, Antonis M. Paschalis, Nektarios Kranitis, 2012, IEEE Transactions on Dependable and Secure Computing.