Masaru Kudo

Energy Efficient Write Verify and Retry Scheme for MTJ Based Flip-Flop and Application

Hideharu Amano, Kimiyoshi Usami, Yusuke Shuto, 2018, 2018 IEEE 7th Non-Volatile Memory Systems and Applications Symposium (NVMSA).

MTJ Based Non-Volatile Flip Flop to Prevent Useless Store Operation

Kimiyoshi Usami, Masaru Kudo, 2015 .

Power gating for FDSOI using dynamically body-biased power switch

Kimiyoshi Usami, Masaru Kudo, Yuichi Kumagai, 2015, EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon.

Nonvolatile power gating with MTJ based nonvolatile flip-flops for a microprocessor

Kimiyoshi Usami, Masaru Kudo, 2017, 2017 IEEE 6th Non-Volatile Memory Systems and Applications Symposium (NVMSA).

Unbalanced buffer tree synthesis to suppress ground bounce for fine-grain power gating

Hiroshi Nakamura, Hideharu Amano, Kimiyoshi Usami, 2014, 2014 International Symposium on System-on-Chip (SoC).

Design and control methodology for fine grain power gating based on energy characterization and code profiling of microprocessors

Hiroshi Nakamura, Hideharu Amano, Hiroaki Kobayashi, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

Design and evaluation of fine-grained power-gating for embedded microprocessors

Hiroshi Nakamura, Hideharu Amano, Hiroaki Kobayashi, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14µA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology

Hideharu Amano, Duc-Hung Le, Cong-Kha Pham, 2014, 2014 IEEE COOL Chips XVII.

An MTJ-based Flip-Flop Circuit to Improve Robustness in Store/Restore Operations

Masaru Kudo, Keizo Hiraga, Kojiro Yagami, 2016 .

A Coarse Grained-Reconfigurable Accelerator with energy efficient MTJ-based Non-volatile Flip-flops

Hideharu Amano, Kimiyoshi Usami, Yusuke Shuto, 2018, 2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig).