Yoshihito Amemiya

发表

A Multiple-Valued Neuron Device Using Single-Electoron Circuits

Takashi Yamada, Nobotu Asahi, Yoshihito Amemiya, 1999 .

?MOS cellular-automaton circuit for picture thinning and shrinking

Masayuki Ikebe, Yoshihito Amemiya, Koji Kameishi, 1999 .

A functional νMOS circuit for implementing cellular-automaton picture-processing devices

Yoshihito Amemiya, M. Akazawa, M. Ikebe, 1997 .

On-Chip Fixed-Pattern-Noise Canceling by Negative-Feedback Reset for CMOS Image Sensors

Tetsuya Asai, Masayuki Ikebe, Yoshihito Amemiya, 2005 .

νMOS Cellular-Automaton Circuit for Picture Thinning and Shrinking

Masayuki Ikebe, Yoshihito Amemiya, Koji Kameishi, 1997 .

C-12-32 Low-power CMOS logic circuits consisting of cascode structure

Keishi Kubo, Eiichi Sano, Yoshihito Amemiya, 2011 .

Level-shift Circuit using Subthreshold-operated CMOS Operational Amplifiers

Tetsuya Asai, Eiichi Sano, Yoshihito Amemiya, 2009 .

Critical temperature switch circuit with CMOS subthreshold region

Tetsuya Asai, Atsushi Hagiwara, Tetsuya Hirose, 2006 .

electrode structure for semiconductor devices

Yoshihito Amemiya, Takayuki Sugeta, Yoshihiko Mizusdhima, 1980 .

High-speed analogue neural-network LSI employing super-selfaligned Si bipolar process technology

Atsushi Iwata, Takao Matsumoto, Masafumi Koga, 1991 .