Chua-Chin Wang

发表

A 2K/8K mode small-area FFT processor for OFDM demodulation of DVB-T receivers

Chua-Chin Wang, Jian-Ming Huang, Hsian-Chang Cheng, 2005, 2005 Digest of Technical Papers. International Conference on Consumer Electronics, 2005. ICCE..

Accurate RR-Interval Detection with Daubechies Filtering and Adaptive Thresholding

Chua-Chin Wang, Mochammad Rif’an, Robert Rieger, 2020 .

A high speed transceiver front-end design with fault detection for FlexRay-based automotive communication systems

Gang-Neng Sung, Chua-Chin Wang, Yi Hu, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

4.15 W SIDO Buck Converter with Low Cross Regulation Using Adaptive PCCM Control

Tzung-Je Lee, Chua-Chin Wang, Chih-Kai Wang, 2020, 2020 2nd International Conference on Smart Power & Internet Energy Systems (SPIES).

Sampling Rate Enhancement for SAR-ADCs Using Adaptive Reset Approach for FOG Systems

Chua-Chin Wang, Yi-Jen Chiu, Chun-Ting Chen, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

A Slew Rate Enhanced 2 x VDD I/O Buffer With Precharge Timing Technique

Tzung-Je Lee, Chua-Chin Wang, Ssu-Wei Huang, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Multifunctional In-Memory Computation Architecture Using Single-Ended Disturb-Free 6T SRAM

Nanang Sulistiyanto, Chua-Chin Wang, Yu-Hsuan Chen, 2020 .

Feed-forward Output Swing Prediction AGC design with Parallel-Detect Singular-Store Peak Detector

Chua-Chin Wang, Shang-Hsien Yang, 2012, Microelectron. J..

An analysis of high-capacity discrete exponential BAM

Hon-Son Don, Chua-Chin Wang, 1995, IEEE Trans. Neural Networks.

Low-Power Small-Area Digital I/O Cell

Ching-Li Lee, Chua-Chin Wang, Chiuan-Shian Chen, 2005, IEEE Trans. Circuits Syst. II Express Briefs.

Improved design of C/sup 2/PL 3-2 compressors with less transistor count

Chua-Chin Wang, Po-Ming Lee, Chenn-Jung Hunng, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

A 1.7-ns Access Time SRAM Using Variable Bulk Bias wordline-Controlled transistors

Gang-Neng Sung, Ching-Li Lee, Chua-Chin Wang, 2008, J. Circuits Syst. Comput..

Wide-range CTAT and PTAT sensors with second-order calibration for on-chip thermal monitoring

Chua-Chin Wang, Wen-Je Lu, Tzu-Chao Wu, 2015, Microelectron. J..

Low-Power Multiplier Design Using a Bypassing Technique

Gang-Neng Sung, Chua-Chin Wang, 2009, J. Signal Process. Syst..

A FlexRay Transceiver Design with Bus Guardian for In-car Networking Systems Compliant with FlexRay Standard

Gang-Neng Sung, Chua-Chin Wang, Chih-Lin Chen, 2014, J. Signal Process. Syst..

Low-cost video decoder with 2D2L comb filter for NTSC digital TVs

Ching-Li Lee, Chua-Chin Wang, Ming-Kai Chang, 2005, IEEE Trans. Consumer Electron..

A 2×VDD output buffer with PVT detector for slew rate compensation

Chua-Chin Wang, Ron-Chi Kuo, Chih-Lin Chen, 2013, Microelectron. J..

67.5-fJ Per Access 1-kb SRAM Using 40-nm Logic CMOS Process

Chua-Chin Wang, Chien-Ping Kuo, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

SRAM-Based Computation in Memory Architecture to Realize Single Command of Add-Multiply Operation and Multifunction

Chia-Hung Yeh, Chua-Chin Wang, Chia-Yi Huang, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

An AI AUV Enabling Vision-based Diver-following and Obstacle Avoidance with 3D-modeling Dataset

Chua-Chin Wang, Chau-Chang Wang, Yu-Cheng Chou, 2021, 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS).

Tutorial: Design of High-Speed Nano-Scale CMOS Mixed-Voltage Digital I/O Buffer With High Reliability to PVTL Variations

Chua-Chin Wang, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 100 MHz 9.14-mW 8-Bit Shift Register Using Double-Edge Triggered Flip-Flop

Chua-Chin Wang, Uday Kiran Naidu Ekkurthi, Venkatesh Dasari, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

A 40-nm CMOS Piezoelectric Energy Harvesting IC for Wearable Biomedical Applications

Ya-Hsin Hsueh, Chua-Chin Wang, Lean Karlo S. Tolentino, 2021, Electronics.

A Single-Ended Low Power 16-nm FinFET 6T SRAM Design With PDP Reduction Circuit

Chua-Chin Wang, Ralph Gerard B. Sangalang, I-Ting Tseng, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

200-MHz Single-Ended 6T 1-kb SRAM With 0.2313 pJ Energy/Access Using 40-nm CMOS Logic Process

Chua-Chin Wang, Chien-Ping Kuo, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

High-Accuracy Impedance Read-out Circuit for BIA-type Biomedical Sensors

I-Yu Huang, Chua-Chin Wang, Tsung-Yi Tsai, 2021, Circuits, Systems, and Signal Processing.

0.7 % error rate 3A bidirectional current sensor using high voltage CMOS process

Chua-Chin Wang, Pang-Yen Lou, Hsiu-Chun Tsai, 2021, Microelectron. J..

Cell-based implementation of radix-4/2 64b dividend 32b divisor signed integer divider using the COMPASS cell library

Chi-Chun Huang, Chua-Chin Wang, G.-C. Lin, 2000 .

A fast-locking clock and data recovery circuit with a lock detector loop

Chua-Chin Wang, Chih-Lin Chen, Chun-Ying Juan, 2011, 2011 International Symposium on Integrated Circuits.

Dynamic NOR-NOR PLA design with IDDQ testability

Chia-Hsiung Kao, Chua-Chin Wang, Chi-Feng Wu, 1999 .

Development of Implantable Wireless Biomicrosystem for Measuring Electrode-Tissue Impedance

Chua-Chin Wang, Chih-Kuo Liang, Yu-Ting Li, 2005 .

ROM-less DDFS using non-equal division parabolic polynomial interpolation method

Chia-Hao Hsu, Yun-Chi Chen, Chua-Chin Wang, 2011, 2011 International Symposium on Integrated Circuits.

A 90-nm CMOS 800 MHz 2$$\times$$×VDD output buffer with leakage detection and output current self-adjustment

Chua-Chin Wang, Tsung-Yi Tsai, Wei Lin, 2018, Analog Integrated Circuits and Signal Processing.

Ultrasonic transcutaneous energy transfer using a continuous wave 650 kHz Gaussian shaded transmitter.

Doron Shmilovitz, Sigmond Singer, Chua-Chin Wang, 2010, Ultrasonics.

20 MHz accurate peak detector for FPW allergy biosensor with digital calibration

Wei-Chih Hsiao, Chua-Chin Wang, Tzung-Je Lee, 2011, 2011 International Symposium on Integrated Circuits.

A VDD to VDD Bidirectional I/O Buffer With a Dynamic Gate Bias Generator

Chia-Hao Hsu, Chua-Chin Wang, Yi-Cheng Liu, 2010 .

A fast CEA analyzer prototype for point of care testing

Chua-Chin Wang, Chiang-Hsiang Liao, Je-Wei Lan, 2014, 2014 IEEE International Conference on Electron Devices and Solid-State Circuits.

Low-cost video decoder with 2D2L comb filter for NTSC digital TVs

Chua-Chin Wang, Ming-Kai Chang, Ching-Li Lee, 2005, 2005 Digest of Technical Papers. International Conference on Consumer Electronics, 2005. ICCE..

A to Bidirectional I/O Buffer With a Dynamic Gate Bias Generator

Chia-Hao Hsu, Chua-Chin Wang, Yi-Cheng Liu, 2010 .

A frequency-shift readout system for FPW allergy biosensor

Chia-Hao Hsu, Yue-Da Tsai, Yun-Chi Chen, 2011, 2011 IEEE International Conference on IC Design & Technology.

Slew rate improved 2×VDD output buffer using leakage and delay compensation

Chua-Chin Wang, Tzung-Je Lee, Wei Lin, 2014, 2014 IEEE International Conference on Electron Devices and Solid-State Circuits.